part15

Chapter 18: Nonideal MOS

Where we are. In Chapters 16 and 17 we met the ideal MOS structure: a perfect insulator, no stray charges, and a metal and semiconductor that “agree” on their work functions. It is a physicist’s cartoon. Real devices are never that tidy. This chapter is the story of how reality departs from the cartoon, which villains cause the departures, how engineers hunted them down, and what is left over for the MOSFET threshold voltage.

Think of it like this. The ideal MOS capacitor is a perfectly level billiard table. Real devices have a slightly tilted table (work-function difference), chalk dust on the felt (oxide charges), and a few sticky spots at the cushion (interface traps). The ball (the $C$-$V$ curve) still rolls, but its path is shifted, smeared, and sometimes unstable. This chapter teaches you to read those distortions as fingerprints.

Because the MOS capacitor is simple to build, almost every nonideality is diagnosed from its $C$-$V$ curve. But the same imperfections hit the MOSFET, mostly through the threshold voltage $V_T$ (and, for interface traps, through $g_m$). The last section treats the transistor directly.

Constants used throughout (Si, $T=300$ K): $K_s=11.8$, $K_O=3.9$, ${\epsilon }_0=8.85\times 10^{-14}$ F/cm, $n_i=10^{10}$ cm${}^{-3}$, $kT=0.0259$ eV, $E_G=1.12$ eV, and $C_O=K_O{\epsilon }_0/x_o$ (oxide capacitance per unit area).

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18.1 Metal-Semiconductor Work-Function Difference

The idea

In the ideal MOS structure we assumed ${\Phi }_M={\Phi }_S=\chi +(E_C-E_F{)}_{FB}$: the energy needed to lift an electron from the Fermi level to vacuum is the same in the metal and in the semiconductor. Then at $V_G=0$ nothing pulls on the semiconductor and the bands are flat.

In a real Al-SiO${}_2$-Si system the Fermi level sits at a different depth below vacuum in each isolated material:

${\Phi }_M\ne {\Phi }_S=\chi +(E_C-E_F{)}_{FB}$

(Fig. 18.1(a) draws the isolated components to scale.)

A thought experiment: bringing the two materials together

Imagine a wire connecting metal and semiconductor, and slide them toward each other in vacuum until they are a distance $x$ apart.

1. The wire lets charge flow, so the Fermi levels must line up (equilibrium).
2. If ${\Phi }_M\ne {\Phi }_S$, lining up the Fermi levels forces the vacuum levels of the two pieces to sit at different energies.
3. A vacuum-level difference means an electric field in the gap, and that field penetrates the semiconductor as band bending. The closer the pieces get, the stronger the field and bending.
4. Finally slip the insulator into the gap. It lowers the effective barriers (${\Phi }_M\to {\Phi }_M^{\prime }$, $\chi \to {\chi }^{\prime }$, both by the same oxide electron affinity) and weakens the field by $K_O$.

Result (Fig. 18.1(b)): at $V_G=0$ the semiconductor is not at flat band. There is a built-in potential, just as in a pn junction or metal-semiconductor diode.

Deriving the built-in potential

Equate the energy measured from the Fermi level up to the common reference along the two sides of the insulator:

$\underset{\text{metal side}}{\underbrace{{\Phi }_M^{\prime }+q\Delta \varphi }}=\underset{\text{semiconductor side}}{\underbrace{(E_C-E_F{)}_{FB}-q{\varphi }_s+{\chi }^{\prime }}}(18.1)$

Here $\Delta \varphi$ is the potential difference across the insulator and ${\varphi }_s$ the surface potential. With the metal as zero-potential reference (the usual convention for built-in potentials), the potential difference across the whole structure is

${\varphi }_{bi}=-({\varphi }_s+\Delta \varphi )={\varphi }_{MS}(18.2)$

where

${\varphi }_{MS}=\frac{{\Phi }_M^{\prime }-{\chi }^{\prime }}{q}-\frac{(E_C-E_F{)}_{FB}}{q}(18.3)$

Intuition: the built-in potential of an otherwise ideal structure is simply the work-function difference in volts. Note ${\Phi }_M^{\prime }-{\chi }^{\prime }={\Phi }_M-\chi$ because the oxide lowers both by the same amount.

Effect on the $C$-$V$ curve

Take Fig. 18.1(b) as a p-type MOS-C (${\varphi }_{MS}<0$). To undo the built-in potential and reach ${\varphi }_s=0$ we must apply $V_G={\varphi }_{MS}$, a negative voltage. Flat band means the same capacitance in real and ideal devices, so the real flat-band point is displaced ${\varphi }_{MS}$ volts along the voltage axis (Fig. 18.2).

The argument works at any point on the curve, since each ${\varphi }_s$ maps to exactly one capacitance. So the whole real curve is translated rigidly:

$\boxed{\Delta V_G=(V_G-V_G^{\prime }{)}_{\text{same }C}={\varphi }_{MS}}(18.4)$

where $V_G^{\prime }$ is the ideal-device gate voltage. (The book uses a prime for ideal-device voltages only in this chapter, where real and ideal appear together.)

Typical values

${\varphi }_{MS}$ is computed from (18.3) using the appropriate ${\Phi }_M^{\prime }-{\chi }^{\prime }$ and the doping-dependent $(E_C-E_F{)}_{FB}$. At $T=300$ K: n${}^{+}$ poly-Si gate has ${\Phi }_M-\chi =-0.18$ eV; Al gate has ${\Phi }_M-\chi =-0.03$ eV. Fig. 18.3 plots ${\varphi }_{MS}$ against doping for both. Qualitatively: Al on p-Si gives about $-0.9$ V at $10^{15}$ cm${}^{-3}$ and becomes more negative with doping; Al on n-Si is about $-0.3$ V at $10^{15}$; n${}^{+}$ poly on p-Si is the most negative (about $-1$ V or more); n${}^{+}$ poly on n-Si lies between Al(n-Si) and Al(p-Si).

Table 18.1: ${\Phi }_M-{\chi }^{\prime }$ for selected metal-SiO${}_2$-Si structures

Gate metal	${\Phi }_M-{\chi }^{\prime }$ (eV)
Ag	0.73
Au	0.82
Cr	$-0.06$
Cu	0.63
Mg	$-1.05$
Sn	$-0.83$

Take-home: ${\varphi }_{MS}$ is more often negative than not (especially for p-type) and is about a volt or less. It is small, perfectly predictable and cannot cause instabilities.

Exercise 18.1

Problem. Can one choose gate material and doping to make ${\varphi }_{MS}=0$, for $10^{14}\le N_A$ or $N_D\le 10^{18}$ cm${}^{-3}$ at 300 K? Use Table 18.1.

Solution. We need ${\Phi }_M^{\prime }-{\chi }^{\prime }=(E_C-E_F{)}_{FB}$, so first find the range of $(E_C-E_F{)}_{FB}$.

$(E_C-E_F{)}_{FB}=(E_C-E_i)+(E_i-E_F)$

$\text{n-type: }(E_C-E_F{)}_{FB}\simeq \frac{E_G}{2}-kT\ln \frac{N_D}{n_i}\text{p-type: }(E_C-E_F{)}_{FB}\simeq \frac{E_G}{2}+kT\ln \frac{N_A}{n_i}$

With $E_G/2=0.56$ eV:

$N_D=10^{14}:0.56-0.0259\ln (10^4)=0.56-0.24=0.32\text{ eV}$ $N_D=10^{18}:0.56-0.0259\ln (10^8)=0.56-0.48=0.08\text{ eV}$ $N_A=10^{14}:0.56+0.24=0.80\text{ eV}{N}_A=10^{18}:0.56+0.48=1.04\text{ eV}$

So $0.08\le (E_C-E_F{)}_{FB}\le 0.32$ eV for n-type and $0.80\le (E_C-E_F{)}_{FB}\le 1.04$ eV for p-type. Since $q{\varphi }_{MS}=({\Phi }_M^{\prime }-{\chi }^{\prime })-(E_C-E_F{)}_{FB}$, zero needs ${\Phi }_M^{\prime }-{\chi }^{\prime }$ inside one of these windows. In Table 18.1 only Au (0.82 eV) qualifies (p-type window).

Required doping: $(E_C-E_F{)}_{FB}=0.82$ eV gives $E_i-E_F=0.82-0.56=0.26$ eV, so

$N_A=n_i{e}^{(E_i-E_F)/kT}=10^{10}{e}^{0.26/0.0259}=2.29\times 10^{14}{\text{cm}}^{-3}.$

Answer: Au gate on p-Si with $N_A=2.29\times 10^{14}$ cm${}^{-3}$.

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18.2 Oxide Charges

18.2.1 General information

The work-function difference is a polite nonideality. Oxide charge is the rowdy one: it creates large shifts and instabilities. Research has identified distinct charge centers in or at the edge of thermally grown SiO${}_2$-Si (Fig. 18.4):

Charge	Location	Nature
Mobile ion charge ($Q_M$)	Anywhere in the oxide	Alkali ions (Na${}^{+}$, K${}^{+}$, Li${}^{+}$) that drift
Oxide trapped charge	In the oxide	Trapped carriers
Fixed oxide charge ($Q_F$)	Very close to the Si-SiO${}_2$ interface	Immobile, positive
Interface trapped charge ($Q_{IT}$)	Exactly at the interface	Electronic states in the gap

A general result for any oxide charge distribution

Put the origin of $x$ at the metal-oxide interface, so the oxide spans $0\le x\le x_o$ (Fig. 18.5), with volume charge density ${\rho }_{ox}(x)$.

Step 1: Gauss’s law in the oxide.

$\frac{d{\mathcal{E}}_{ox}}{dx}=\frac{{\rho }_{ox}(x)}{K_O{\epsilon }_0}(18.5)$

Step 2: integrate from $x$ to $x_o$.

${\mathcal{E}}_{ox}(x_o)-{\mathcal{E}}_{ox}(x)=\frac{1}{K_O{\epsilon }_0}{\int }_x^{x_o}{\rho }_{ox}(x^{\prime })d{x}^{\prime }$

${\mathcal{E}}_{ox}(x)={\mathcal{E}}_{ox}(x_o)-\frac{1}{K_O{\epsilon }_0}{\int }_x^{x_o}{\rho }_{ox}(x^{\prime })d{x}^{\prime }(18.6)$

Step 3: boundary condition at the oxide-semiconductor interface. Continuity of $D=K{\epsilon }_0\mathcal{E}$ (any sheet exactly at $x_o$ is counted inside ${\rho }_{ox}$) gives ${\mathcal{E}}_{ox}(x_o)=K_s{\mathcal{E}}_s/K_O$.

Step 4: voltage across the oxide.

$V_{ox}={\int }_0^{x_o}{\mathcal{E}}_{ox}(x)dx=x_o{\mathcal{E}}_{ox}(x_o)-\frac{1}{K_O{\epsilon }_0}{\int }_0^{x_o}{\int }_x^{x_o}{\rho }_{ox}(x^{\prime })d{x}^{\prime }dx(18.7)$

Step 5: collapse the double integral by swapping the order of integration over the triangle $0\le x\le x^{\prime }\le x_o$ (equivalent to integration by parts). Since ${\int }_0^{x^{\prime }}dx=x^{\prime }$,

${\int }_0^{x_o}{\int }_x^{x_o}{\rho }_{ox}(x^{\prime })d{x}^{\prime }dx={\int }_0^{x_o}{x}^{\prime }{\rho }_{ox}(x^{\prime })d{x}^{\prime }$

$V_{ox}=\frac{K_s}{K_O}{\mathcal{E}}_s{x}_o-\frac{1}{K_O{\epsilon }_0}{\int }_0^{x_o}x{\rho }_{ox}(x)dx(18.8)$

Step 6: gate voltage. For a structure that is otherwise ideal, $V_G={\varphi }_s+V_{ox}$:

$V_G={\varphi }_s+\frac{K_s}{K_O}{\mathcal{E}}_s{x}_o-\frac{1}{K_O{\epsilon }_0}{\int }_0^{x_o}x{\rho }_{ox}(x)dx(18.9)$

For the ideal device (no oxide charge):

$V_G^{\prime }={\varphi }_s+\frac{K_s}{K_O}{\mathcal{E}}_s{x}_o(18.10)$

Step 7: subtract at the same ${\varphi }_s$ (same ${\mathcal{E}}_s$, same capacitance):

$\boxed{\Delta V_G(\text{oxide charges})=-\frac{1}{K_O{\epsilon }_0}{\int }_0^{x_o}x{\rho }_{ox}(x)dx}(18.11)$

This is added to the work-function shift of (18.4).

Intuition: charge near the semiconductor is the most powerful. The weight $x$ says that a sheet near the semiconductor ($x\approx x_o$) ends almost all its field lines on the semiconductor surface, while charge near the metal is “screened” by the metal and barely influences the semiconductor. Positive oxide charge helps the gate, so less gate voltage is needed: the $C$-$V$ curve shifts toward negative voltage.

18.2.2 Mobile ions

The mystery. Early (c. 1960) MOS devices showed two baffling effects:

1. As-fabricated $C$-$V$ curves were shifted negatively by tens of volts from theory.
2. Under bias-temperature (BT) stress (heat to about 100 to 200 ${}^{\circ }$C while holding a gate bias) the curves moved again. After positive BT stress, the room-temperature curve shifted tens of volts further negative. After negative BT stress it moved back toward the theoretical curve (Fig. 18.6). Sometimes even a device left positively biased at room temperature during lunch had drifted by a volt on your return. The shift was always opposite to the gate polarity and the curves always lay on the negative side of theory.

A device whose operating point drifts is nearly useless, so the cause had to be found and removed.

The model. Let ${\rho }_{ion}(x)$ be the ionic charge density, with total charge per area

$Q_M={\int }_0^{x_o}{\rho }_{ion}(x)dx(18.12)$

From (18.11):

$\Delta V_G(\text{mobile ions})=-\frac{1}{K_O{\epsilon }_0}{\int }_0^{x_o}x{\rho }_{ion}(x)dx(18.13)$

Positive ions give a negative shift (as observed); negative ions would give a positive shift (not observed). Position matters through the factor $x$. Place the same $Q_M$ near the metal (centroid $0.05x_o$) or near the semiconductor (centroid $0.95x_o$):

$\Delta V_G(a)=-0.05\frac{Q_M}{C_O},\Delta V_G(b)=-0.95\frac{Q_M}{C_O}$

The shift is 19 times larger when the ions sit near the Si-SiO${}_2$ interface (Fig. 18.7(a)). Hypothesis: positive ions that move under bias. Positive BT stress repels them from the gate toward the semiconductor (big negative shift); negative BT stress pulls them to the metal (small shift, curve returns toward theory) (Fig. 18.7(b)).

The detective story. The suspects were alkali ions. Since 1888 it was known that Na${}^{+}$, Li${}^{+}$ and K${}^{+}$ move through crystalline quartz below 250 ${}^{\circ }$C, and sodium is everywhere: reagents, glassware, fingers of lab staff, even the tungsten evaporation boats used to deposit gate metal. Three experiments closed the case:

1. Devices made with great care to exclude alkali ions were stable after hours of BT stress up to 200 ${}^{\circ }$C.
2. Devices deliberately contaminated by rinsing in dilute NaCl or LiCl before metallization were violently unstable.
3. Sodium was directly detected in normally made devices by neutron activation: bombard with neutrons to create a radioactive sodium isotope, then measure the radioactivity.

Cures (clean fabrication was hard to maintain on production lines):

• Phosphorus stabilization. Briefly place the oxidized wafer in a phosphorus diffusion furnace. A thin phosphosilicate glass forms in the outer part of the oxide (Fig. 18.8(a)). At that temperature Na${}^{+}$ is very mobile and wanders into the P-rich glass, where it gets trapped. After cooling, the ions sit near the metal interface (small ${\gamma }_M$, smallest shift) and stay put in operation. The glass also blocks later contamination from metallization.
• Chlorine neutralization. Add a chlorine compound to the furnace ambient during oxide growth. A chlorine-rich material (probably a chlorosiloxane) forms at the oxide-silicon interface; mobile Na${}^{+}$ migrating there is trapped and neutralized, so it no longer affects the device (Fig. 18.8(b)).

Modern practice. With gate oxides near 10 nm, a phosphosilicate layer would have to be a tiny fraction of the oxide, and its gettering volume is hard to control (polarization is also a concern). Chlorine neutralization continues, with careful control of Cl concentration to avoid oxide-thickness variations. Together with purer chemicals and gases, chlorine pre-cleaning of furnace tubes, close monitoring, and a deposited phosphosilicate passivation layer on finished ICs, stable devices are now routine.

Exercise 18.2

Problem. An MOS-C with $x_o=0.1\mu$m shows post-stress $C$-$V$ curves in which the $+$BT curve lies 10 V to the left of the $-$BT curve. Assume after $+$BT all mobile ions form a $\delta$-function at the O-S interface and after $-$BT a $\delta$-function at the M-O interface. Find $Q_M/q$.

Solution.

After $+$BT, ${\rho }_{ion}=Q_M\delta (x-x_o)$. By (18.13):

$\Delta V_G(+BT)=-\frac{1}{K_O{\epsilon }_0}{\int }_0^{x_o}x{Q}_M\delta (x-x_o)dx=-\frac{x_o{Q}_M}{K_O{\epsilon }_0}=-\frac{Q_M}{C_O}$

After $-$BT, ${\rho }_{ion}=Q_M\delta (x)$:

$\Delta V_G(-BT)=-\frac{1}{K_O{\epsilon }_0}{\int }_0^{x_o}x{Q}_M\delta (x)dx=0$

All other nonidealities are unchanged by stress, so the displacement between the curves is the difference:

$\Delta V_G(+BT)-\Delta V_G(-BT)=-10\text{ V}=-\frac{Q_M}{C_O}$

$\frac{Q_M}{q}=\frac{C_O}{q}(10)=\frac{(3.9)(8.85\times 10^{-14})(10)}{(1.6\times 10^{-19})(10^{-5})}=2.16\times 10^{12}{\text{cm}}^{-2}$

Answer: $Q_M/q\approx 2.16\times 10^{12}$ cm${}^{-2}$.

18.2.3 The fixed charge

Discovery. Once mobile ions were eliminated, a subtler effect became visible. Even after correcting for ${\varphi }_{MS}$, $C$-$V$ curves were still shifted by up to a few volts toward negative bias. The devices were BT-stable (so not mobile ions), reproducible for given fabrication conditions, and the effect was confirmed by independent labs. Etching the oxide away in small steps, plus photo-measurements, located the cause: a charge in the oxide very close to the Si-SiO${}_2$ interface, fixed in position and reproducibly built in: the fixed oxide charge $Q_F$.

Model. Put it exactly at the interface:

${\rho }_{ox}(x)=Q_F\delta (x-x_o)(18.14)$

Inserting in (18.11):

$\Delta V_G(\text{fixed charge})=-\frac{x_o{Q}_F}{K_O{\epsilon }_0}=-\frac{Q_F}{C_O}(18.15)$

So $Q_F$ must be positive to explain the negative shifts.

Experimental facts about $Q_F$:

1. Independent of oxide thickness, substrate doping concentration and doping type.
2. Depends on surface orientation: largest on $\{111\}$, smallest on $\{100\}$, ratio about 3:1.
3. Strong function of the terminal oxidation conditions (ambient and temperature). In Fig. 18.9, $Q_F$ falls roughly linearly with increasing oxidation temperature. Only the last step matters: a wafer oxidized in steam at 1000 ${}^{\circ }$C for 1 h and then in dry O${}_2$ at 1200 ${}^{\circ }$C for about 5 min (long enough for steady state) shows only the dry-1200 ${}^{\circ }$C value.
4. Annealing in Ar or N${}_2$ to steady state lowers $Q_F$ to the value of dry oxidation at 1200 ${}^{\circ }$C. Whatever the oxidation, an inert anneal brings $Q_F$ to its minimum (the “oxidation triangle”, Fig. 18.9(b)). For (111) Si the minimum is typically $Q_F/q\approx 2\times 10^{11}$ cm${}^{-2}$, about a third of that on (100).

Clues to the origin. Not ionized dopants (independence of doping). The interfacial position, orientation dependence and sensitivity to terminal oxidation point to the oxidation reaction itself: the oxidant diffuses through existing oxide and reacts at the Si-SiO${}_2$ interface, so the last oxide formed lies next to the interface and holds $Q_F$. Accepted hypothesis: excess ionic silicon that has left the crystal and waits to react when oxidation is abruptly terminated. The first oxide monolayer has indeed been found to be SiO${}_x$ with $x<2$. An inert anneal lets the excess react away.

Exercise 18.3

Problem. An MOS-C has the band diagram of Fig. E18.3 (a metal Fermi level $E_{FM}$, straight oxide bands, and curved bands at the semiconductor surface). (a) Sketch the electric field versus position. (b) Is there ionic charge $Q_M$ distributed through the SiO${}_2$? (c) Is a fixed charge likely at the Si-SiO${}_2$ interface? Explain.

Solution.

(a) $\mathcal{E}(x)$ is proportional to the slope of the bands. In the oxide the bands are straight, so ${\mathcal{E}}_{ox}$ is constant. In the semiconductor the field starts at ${\mathcal{E}}_s$ at the surface and decays to zero at the depletion edge (nearly linearly for uniform doping). At the interface the field jumps discontinuously.

(b) If ${\rho }_{ox}=0$ then $d{\mathcal{E}}_{ox}/dx=0$ and the oxide bands are linear; charge distributed in the oxide would make ${\mathcal{E}}_{ox}$ vary with $x$ and the bands curve. The bands are straight, so $Q_M\approx 0$.

(c) $D=K{\epsilon }_0\mathcal{E}$ is continuous across an interface unless a sheet of charge is there. The diagram shows $D_s=K_s{\epsilon }_0{\mathcal{E}}_s>0$ on the semiconductor side exceeding the oxide-side $D_{ox}=K_O{\epsilon }_0{\mathcal{E}}_{ox}$, so a plane of positive charge must sit at the interface:

$Q_{interface}=D_s-D_{ox}=K_s{\epsilon }_0{\mathcal{E}}_s-K_O{\epsilon }_0{\mathcal{E}}_{ox}>0$

The fixed charge sits right at the interface and is positive, so we suspect $Q_F\ne 0$. (A $D$ discontinuity could also come from mobile ions drifted to the O-S interface by $+$BT, or from interface trapped charge.)

18.2.4 Interfacial traps

Judged by their wide-ranging, degrading effect, interface traps are the most important nonideality in MIS structures. In an MOS-C they show up as a distorted, stretched-out $C$-$V$ curve (Fig. 18.10: one device before and after minimizing interface traps).

What they are. Donors, acceptors and R-G centers are localized levels in the bulk gap (near $E_C$, $E_V$ and $E_i$ respectively). Interfacial traps (also surface states or interface states) are allowed levels localized at the semiconductor surface; unlike bulk dopants they are spread across the gap (Fig. 18.11). Levels beyond the band edges also exist but are masked by the huge band-state density.

How they charge and discharge (Fig. 18.12, n-bulk). Their energies are fixed relative to $E_C$ and $E_V$ at the surface, so as the band bending changes, the Fermi level sweeps through them:

• Inversion (surface $E_F$ near $E_V$): essentially all states above $E_F$ are empty. For donor-like states (positive when empty, neutral when filled) $Q_{IT}>0$.
• Depletion ($E_F$ near midgap): lower states fill with electrons, $Q_{IT}$ decreases.
• Accumulation ($E_F$ near $E_C$): most states filled, $Q_{IT}$ near its minimum.

Being at the interface like $Q_F$:

$\Delta V_G(\text{interfacial traps})=-\frac{Q_{IT}({\varphi }_s)}{C_O}(18.16)$

The crucial difference from $Q_F$: $Q_{IT}$ depends on ${\varphi }_s$. The shift is not rigid; it varies along the curve and stretches it.

A refinement. If all states were donor-like, in accumulation $\Delta V_G$ would remain negative while shrinking toward zero. Experiments (Fig. 18.10) show an increasing positive shift in accumulation. Resolution: states in the upper half of the gap are acceptor-like (neutral when empty, negative when filled), the lower half donor-like. Going toward accumulation, past roughly flat band or midgap, $Q_{IT}$ passes through zero and becomes ever more negative as upper-gap states fill. A quantitative description needs $D_{it}(E)$ and a full theory for $Q_{IT}({\varphi }_s)$.

Physical origin: dangling bonds. Terminating a silicon crystal along a plane leaves one of the four bonds of each surface atom dangling (Fig. 18.13(a)). Thermal oxidation ties up most but not all of them; the leftovers are the interface traps (Fig. 18.13(b)).

Feasibility check. On (100) there are $6.8\times 10^{14}$ Si atoms/cm${}^2$. If 1/1000 give a trap with one electronic charge:

$\frac{Q_{IT}}{q}=\frac{6.8\times 10^{14}}{1000}=6.8\times 10^{11}{\text{cm}}^{-2}$

With $x_o=0.1\mu$m ($C_O=3.45\times 10^{-8}$ F/cm${}^2$):

$\Delta V_G=\frac{(1.6\times 10^{-19})(6.8\times 10^{11})}{3.45\times 10^{-8}}=3.15\text{ V}$

A tiny fraction of unterminated bonds is enough to matter.

Trends in the interface-state density $D_{it}$ (states/cm${}^2$-eV):

• Highest on $\{111\}$, lowest on $\{100\}$, midgap ratio about 3:1.
• After dry-O${}_2$ oxidation, midgap $D_{it}$ is high ($10^{11}$ to $10^{12}$) and rises with oxidation temperature. An inert anneal does not help; a low-temperature hydrogen anneal ($\lesssim 500{}^{\circ }$C) does.
• After an ideal interface-state anneal, midgap $D_{it}\lesssim 10^{10}$, roughly flat in the middle of the gap and rising sharply toward the band edges (Fig. 18.14).
• States near the conduction band edge are acceptor-like and those near the valence band edge donor-like, in about equal numbers.

Annealing methods.

• Postmetallization anneal (needs a chemically active gate such as Al or Cr): anneal the metallized structure in N${}_2$ at about 450 ${}^{\circ }$C for 5 to 10 min. Adsorbed water vapor on the oxide reacts with the gate metal and releases atomic hydrogen, which diffuses through the oxide to the interface and caps dangling bonds, making them inactive (Fig. 18.15).
• Hydrogen-ambient anneal: same principle, hydrogen supplied from the gas; the structure need not be metallized.

Perspective. Without thermal oxide’s ability to tie up most dangling bonds, and without hydrogen annealing, MOS devices would be a laboratory curiosity. High interface-trap densities have severely stunted other insulator-semiconductor systems.

18.2.5 Induced charges

Radiation effects

Radiation (x-rays, energetic electrons, protons, heavy ions) is a concern for space and military electronics; the early Telstar satellite was temporarily disabled by the Van Allen belt. In MOS devices, irradiation always raises both the apparent fixed charge and the interface-trap density. The damage sequence (Fig. 18.16):

1. Ionizing radiation creates electron-hole pairs throughout the oxide; a fraction recombines immediately.
2. The oxide field separates the survivors. Electrons (relatively mobile) are swept out in nanoseconds.
3. Holes, much less mobile, hop through localized states toward the Si-SiO${}_2$ interface (for positive gate bias), where they recombine with Si electrons or get trapped at deep levels. These trapped holes mimic fixed charge: apparent $Q_F$ rises.
4. New interface traps appear, some immediately, the rest in proportion to the holes reaching the interface. Proposed mechanism: energy released in deep hole trapping breaks Si-H bonds that had passivated traps.

Recovery. Over days to years at room temperature, trapped holes are neutralized by electrons injected from metal or silicon. Thermal annealing speeds this; a standard interface-trap anneal removes trapped holes and induced traps. But after an irradiate-anneal cycle devices are more sensitive to later radiation, attributed to neutral oxide traps (partly removed above 600 ${}^{\circ }$C). After-the-fact recovery in finished devices (e.g. warming to about 100 ${}^{\circ }$C) is limited.

Hardening is mainly preventive: empirically optimized growth (e.g. oxidation below 1000 ${}^{\circ }$C), aluminium shielding (stops energetic space electrons), and a raised MOSFET threshold so $\Delta V_G$ matters less (Section 18.3). Conveniently, scaling helps: $\Delta V_G$ from $Q_F$ and $Q_{IT}$ is proportional to $1/C_O=x_o/K_O{\epsilon }_0$ and shrinks with thinner oxide; hole-trapping cross sections shrink at the high fields of thin oxides; and below about 10 nm electrons from metal and silicon can tunnel into all parts of the oxide and annihilate trapped holes. (Radiation damage can also occur during fabrication: ion implantation, e-beam evaporation, sputtering, plasma processing, e-beam and x-ray lithography.)

Negative-bias instability

Large negative gate bias at elevated temperature (e.g. oxide field about $2\times 10^6$ V/cm and $T>250{}^{\circ }$C) produces a large negative shift and distortion of the $C$-$V$ curve. Like radiation, it increases apparent $Q_F$ and $Q_{IT}$; an added midgap peak in $D_{it}$ is the distinctive signature. Note the shift direction is opposite to alkali-ion behavior after negative stress. The exact mechanism is unsettled; since large hole populations sit next to the oxide under negative stress, the proposal is hole injection from Si into the oxide and trapping at deep sites near the interface (a link to radiation damage; the instability is enhanced if the structure is first irradiated). Sensitivity can be reduced by a hydrogen anneal at 800 to 900 ${}^{\circ }$C before gate deposition.

18.2.6 $\Delta V_G$ summary

We have met work-function difference, mobile ions, fixed charge and interface traps, plus radiation and negative-bias stress that raise apparent $Q_F$ and $Q_{IT}$. Combined:

$\boxed{\Delta V_G=(V_G-V_G^{\prime }{)}_{\text{same }{\varphi }_s}={\varphi }_{MS}-\frac{Q_F}{C_O}-{\gamma }_M\frac{Q_M}{C_O}-\frac{Q_{IT}({\varphi }_s)}{C_O}}(18.17)$

with the dimensionless mobile-ion centroid

${\gamma }_M\equiv \frac{{\int }_0^{x_o}x{\rho }_{ion}(x)dx}{x_o{\int }_0^{x_o}{\rho }_{ion}(x)dx}(18.18)$

(${\gamma }_M=0$ if all ions are at the metal-oxide interface; ${\gamma }_M=1$ if all are at the oxide-semiconductor interface.) The terms ${\varphi }_{MS}$, $Q_F$ and $Q_M$ translate the $C$-$V$ curve in parallel; $Q_{IT}$ can shift either way depending on bias and distorts/spreads the curve.

Real MOS devices are intrinsically imperfect, yet extensive research lets manufacturers routinely fabricate near-ideal ones (with constant quality-control checks). The cures cited apply specifically to thermally grown SiO${}_2$-Si.

Exercise 18.4

Problem. Match each oxide charge ($Q_F$, $Q_M$, $Q_{IT}$, apparent $Q_F$ from ionizing radiation) with its physical cause: (a) P${}^{+}$ ions, (b) Na${}^{+}$ ions, (c) N${}^{+}$ ions, (d) dangling bonds at the Si surface, (e) trapped electrons, (f) ionized Si waiting to be oxidized, (g) ionized oxygen waiting to form SiO${}_2$, (h) trapped holes.

Solution. $Q_F\to$ (f); $Q_M\to$ (b); $Q_{IT}\to$ (d); apparent $Q_F$ from radiation $\to$ (h).

Exercise 18.5

Problem. An Al-SiO${}_2$-Si MOS-C is formed on an $N_A=10^{15}$ cm${}^{-3}$ (100) Si wafer. Oxidation in dry O${}_2$ at 1200 ${}^{\circ }$C is followed by an N${}_2$ anneal to steady state. The structure is phosphorus-gettered so that mobile ions $Q_M/q=2\times 10^{11}$ cm${}^{-2}$ are uniformly distributed over the outer 10% of the oxide, $0\le x\le 0.1x_o$ (Fig. E18.5). A postmetallization anneal is done, but a constant $D_{it}=2\times 10^{10}$ cm${}^{-2}$eV${}^{-1}$ of acceptor-like states remains at all gap energies. Find $V_{FB}$ at $T=300$ K, $x_o=0.1\mu$m.

Solution. At flat band ${\varphi }_s=0$, $V_G^{\prime }=0$, so from (18.17)

$V_{FB}={\varphi }_{MS}-\frac{Q_F}{C_O}-\frac{{\gamma }_M{Q}_M}{C_O}-\frac{Q_{IT}(0)}{C_O}$

$C_O=\frac{(3.9)(8.85\times 10^{-14})}{10^{-5}}=3.45\times 10^{-8}{\text{F/cm}}^2$

Term 1. Al gate, $N_A=10^{15}$: Fig. 18.3 gives ${\varphi }_{MS}=-0.90$ V.

Term 2. The N${}_2$ anneal gives the minimum $Q_F$; Fig. 18.9(b) gives $Q_F/q=2\times 10^{11}$ cm${}^{-2}$ for (111), and (100) is three times smaller:

$\frac{Q_F}{q}=\frac{2\times 10^{11}}{3}=6.67\times 10^{10}{\text{cm}}^{-2}$

$\frac{Q_F}{C_O}=\frac{(1.6\times 10^{-19})(6.67\times 10^{10})}{3.45\times 10^{-8}}=0.31\text{ V}$

Term 3. Uniform ${\rho }_{ion}$ on $[0,0.1x_o]$:

${\gamma }_M=\frac{{\int }_0^{0.1x_o}xdx}{x_o{\int }_0^{0.1x_o}dx}=\frac{(0.1x_o{)}^2/2}{x_o(0.1x_o)}=0.05$

$\frac{{\gamma }_M{Q}_M}{C_O}=\frac{(1.6\times 10^{-19})(2\times 10^{11})(0.05)}{3.45\times 10^{-8}}=0.046\text{ V}$

Term 4. Acceptor-like traps are negative when filled (states below $E_F$) and neutral when empty (above $E_F$). At flat band (equilibrium) the charged states are those between $E_V$ and $E_F$, so the energy span with negative traps is

$\Delta E=E_F-E_V=\frac{E_G}{2}-(E_i-E_F)=\frac{E_G}{2}-kT\ln \frac{N_A}{n_i}=0.56-0.0259\ln (10^5)=0.26\text{ eV}$

$Q_{IT}(0)=-q{D}_{it}\Delta E\Rightarrow -\frac{Q_{IT}(0)}{C_O}=\frac{(1.6\times 10^{-19})(2\times 10^{10})(0.26)}{3.45\times 10^{-8}}=+0.024\text{ V}$

Sum.

$V_{FB}=-0.90-0.31-0.046+0.024=-1.23\text{ V}$

Answer: $V_{FB}\approx -1.23$ V. (The mobile-ion term is tiny because stabilization keeps ions near the metal.)

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18.3 MOSFET Threshold Considerations

So far we described nonidealities as $C$-$V$ shifting and distortion. The point on the $C$-$V$ curve corresponding to the MOSFET threshold is displaced by $\Delta V_G$ like any other point, so $V_T$ is directly affected.

Effect on $I_D$-$V_D$ curves (Fig. 18.17). Take a hypothetical p-channel MOSFET with ideal $V_T=-1$ V.

• (a) A pure translation (from ${\varphi }_{MS}$, $Q_F$ and/or mobile ions) leaves the shape of the family of curves unchanged, but different gate voltages are needed to reach the same current levels: the whole family slides along the $V_G$ axis.
• (b) Interface traps in large density additionally shrink the current change produced by a given gate-voltage step. That is equivalent to a lowered transconductance $g_m$, so the curves are not just slid but also bunched together.

Mobile ions and interface traps were largely tamed early in MOSFET history, but the remaining nonidealities, mostly through $V_T$, have strongly shaped technology, device design and modes of operation. This section explains why and how $V_T$ is adjusted.

18.3.1 $V_T$ relationships

Let $V_T^{\prime }$ be the threshold voltage of an ideal version of the MOSFET. Evaluating (18.17) at ${\varphi }_s=2{\varphi }_F$ gives the real threshold:

$V_T=V_T^{\prime }+{\varphi }_{MS}-\frac{Q_F}{C_O}-\frac{{\gamma }_M{Q}_M}{C_O}-\frac{Q_{IT}(2{\varphi }_F)}{C_O}(18.19)$

It is standard to write the shift via the real-device flat-band voltage. At flat band ${\varphi }_s=0$ and $V_G^{\prime }=0$, so by (18.17)

$V_{FB}=V_G{|}_{{\varphi }_s=0}={\varphi }_{MS}-\frac{Q_F}{C_O}-\frac{{\gamma }_M{Q}_M}{C_O}-\frac{Q_{IT}(0)}{C_O}(18.20)$

If $Q_{IT}$ changes little between ${\varphi }_s=0$ and ${\varphi }_s=2{\varphi }_F$ (a reasonable approximation in well-made devices), the nonideality terms of (18.19) are replaced by $V_{FB}$:

$\boxed{V_T=V_T^{\prime }+V_{FB}}(18.21)$

where (repeating Eq. 17.1; upper sign n-channel, lower sign p-channel)

$V_T^{\prime }=2{\varphi }_F\pm \frac{K_s}{K_O}{x}_o\sqrt{\frac{4q{N}_B}{K_s{\epsilon }_0}(\pm {\varphi }_F)}{N}_B=N_A\text{ or }{N}_D(18.22)$

(in this form ${\varphi }_F>0$ for n-channel/p-bulk and ${\varphi }_F<0$ for p-channel/n-bulk, with $2{\varphi }_F$ appearing as written).

Where (18.22) comes from (n-channel). At threshold ${\varphi }_s=2{\varphi }_F$, the depletion width is $W=\sqrt{2K_s{\epsilon }_0(2{\varphi }_F)/q{N}_A}=\sqrt{4K_s{\epsilon }_0{\varphi }_F/q{N}_A}$, the depletion charge is $q{N}_{A}W=\sqrt{4K_s{\epsilon }_{0}q{N}_A{\varphi }_F}$, and the oxide drop is that charge over $C_O$:

$V_T^{\prime }=2{\varphi }_F+\frac{\sqrt{4K_s{\epsilon }_{0}q{N}_A{\varphi }_F}}{C_O}=2{\varphi }_F+\frac{K_s}{K_O}{x}_o\sqrt{\frac{4q{N}_A{\varphi }_F}{K_s{\epsilon }_0}}$

18.3.2 Threshold, terminology and technology

A sample calculation. Al gate, (111) Si, $T=300$ K, $x_o=0.1\mu$m, $N_A=10^{15}$ cm${}^{-3}$, $Q_F/q=2\times 10^{11}$ cm${}^{-2}$, $Q_M=0$, $Q_{IT}=0$ (n-channel).

${\varphi }_{MS}=-0.90\text{ V}-\frac{Q_F}{C_O}=-\frac{(1.6\times 10^{-19})(2\times 10^{11})}{3.45\times 10^{-8}}=-0.93\text{ V}$ $V_{FB}=-0.90-0.93=-1.83\text{ V}$

${\varphi }_F=0.0259\ln (10^5)=0.298\text{ V},V_T^{\prime }=0.596+\frac{\sqrt{4(11.8)(8.85\times 10^{-14})(1.6\times 10^{-19})(10^{15})(0.298)}}{3.45\times 10^{-8}}\approx 1.00\text{ V}$

$V_T=V_T^{\prime }+V_{FB}=1.00-1.83=-0.83\text{ V}$

An ideal threshold of $+1$ V has become $-0.83$ V: realistic nonidealities flipped the sign. An n-channel device turns on for $V_G>V_T$, so this one is already on at $V_G=0$ and negative gate bias is needed to turn it off.

For the p-channel version (same parameters, n-substrate with $N_D=10^{15}$): Al on n-Si gives ${\varphi }_{MS}\approx -0.30$ V, so

$V_{FB}=-0.30-0.93=-1.23\text{ V},V_T^{\prime }=-1.00\text{ V},V_T=-2.23\text{ V}$

Here the nonidealities simply make the negative turn-on voltage even more negative.

Enhancement versus depletion mode (Fig. 18.18).

	Enhancement mode	Depletion mode
State at $V_G=0$	Off (no channel)	On (channel exists)
n-channel threshold	$V_T>0$	$V_T<0$
p-channel threshold	$V_T<0$	$V_T>0$
Turning on / off	Gate bias beyond $V_T$ turns it on	Gate bias of the opposite polarity turns it off

Standard p-channel MOSFETs are, ideally and in practice, enhancement mode. n-channel devices are ideally enhancement mode, but because nonidealities push $V_T$ toward negative voltage, early n-channel MOSFETs were typically depletion mode. This is why, until about 1977, PMOS dominated the IC market. Then ion-implantation threshold adjustment (below) made enhancement-mode NMOS routine; NMOS, preferred for the higher electron mobility, now appears in most newly designed ICs.

Parasitic channels between devices. Consider the unmetallized region between two n-channel MOSFETs (Fig. 18.19(a)). If the potential on the outer oxide surface is about zero and the n-channel threshold is negative, the intermediate region is inverted: a conducting pseudo-channel connects the two transistors. Such inversion can also be caused by voltages on metal overlays that carry gate and drain biases. The cure is a much thicker field oxide outside the gated areas (Fig. 18.19(b)). Since $V_T$ grows with oxide thickness, $V_T(\text{field})\gg V_T(\text{gate})$, and the field region stays non-inverted at normal circuit voltages.

18.3.3 Threshold adjustment

Several knobs set $V_T$:

• Oxide thickness and substrate doping: both strongly change $V_T$, but they are mostly fixed by other design constraints.
• Surface orientation: $Q_F$ on (100) is about one third that on (111), so (100) wafers reduce the fixed-charge shift.
• Gate material: a polysilicon gate changes ${\varphi }_{MS}$. For a poly-Si gate the effective “metal” work function is

${\Phi }_M^{\prime }={\chi }^{\prime }+(E_C-E_F{)}_{poly\text{-}Si}(18.23)$

${\varphi }_{MS}=\frac{1}{q}[(E_C-E_F{)}_{poly\text{-}Si}-(E_C-E_F{)}_{FB,crystalline\text{-}Si}](18.24)$

Example, repeating the sample calculation with a (100) surface ($Q_F/q=6.67\times 10^{10}$ cm${}^{-2}$, one third of the (111) value $2\times 10^{11}$) and a p-type poly-Si gate with $E_F=E_V$ (so $(E_C-E_F{)}_{poly}=E_G=1.12$ eV), n-channel on $N_A=10^{15}$ cm${}^{-3}$:

$(E_C-E_F{)}_{FB,Si}=0.56+0.298=0.858\text{ eV}\Rightarrow {\varphi }_{MS}=1.12-0.858=+0.262\text{ V}$ $\frac{Q_F}{C_O}=0.31\text{ V}\Rightarrow V_{FB}=0.262-0.31=-0.048\text{ V}$ $V_T=1.00-0.048\approx +0.95\text{ V}$

So an enhancement-mode n-channel device is possible on (100) with p${}^{+}$ poly. But practical devices may only be nominally positive; the poly in n-channel devices is conveniently doped n-type like source/drain, not p-type; a larger $V_T$ may be wanted; PMOS may need adjusting; and both n- and p-channel devices on one chip may need separately tailored thresholds. A flexible method is needed: ion implantation.

Threshold-adjust implant. A small, precisely controlled dose of boron or phosphorus is implanted into the near-surface silicon (Chapter 4). In depletion or inversion, the implanted dopant adds to the exposed ionic charge near the interface and translates $V_T$: boron gives a positive shift, phosphorus a negative shift. For shallow implants, to first order treat it as an extra fixed charge $Q_I=\pm q{N}_I$ at the interface ($+$ donor-like for P, $-$ acceptor-like for B), with $N_I$ implanted ions/cm${}^2$. By analogy with the fixed charge:

$\Delta V_G(\text{implanted ions})=-\frac{Q_I}{C_O}(18.25)$

Example: $N_I=5\times 10^{11}$ boron ions/cm${}^2$, $x_o=0.1\mu$m:

$\Delta V_G=+\frac{q{N}_I}{C_O}=\frac{(1.6\times 10^{-19})(5\times 10^{11})}{3.45\times 10^{-8}}=+2.32\text{ V}$

18.3.4 Back biasing

Reverse-biasing the back contact (bulk) relative to the source is another, older, electrical adjustment: the body effect (substrate-bias effect). Consider the n-channel MOSFET of Fig. 18.20(a) with substrate-source voltage $V_{BS}$.

If $V_{BS}=0$, inversion starts when the voltage drop across the semiconductor reaches $2{\varphi }_F$ (Fig. 18.20(b)). If $V_{BS}<0$, the semiconductor tries to invert at ${\varphi }_s=2{\varphi }_F$, but the channel’s electrons are drawn laterally into the source and drain regions, which are at lower potential than the bulk (the electron quasi-Fermi level pinned by the source is $|V_{BS}|$ lower in electron energy). The surface does not invert until

${\varphi }_s=2{\varphi }_F-V_{BS}(\text{Fig. 18.20(c)})$

so back bias moves the inversion point from $2{\varphi }_F$ to $2{\varphi }_F-V_{BS}$.

Derivation of the new threshold. The depletion width at the new inversion point is $W=\sqrt{2K_s{\epsilon }_0(2{\varphi }_F-V_{BS})/q{N}_A}$, so the depletion charge is $q{N}_{A}W=\sqrt{2K_s{\epsilon }_{0}q{N}_A(2{\varphi }_F-V_{BS})}$. The gate-to-bulk threshold voltage is the surface potential plus the oxide drop:

$V_{GB}{|}_{th}=2{\varphi }_F-V_{BS}\pm \frac{K_s}{K_O}{x}_o\sqrt{\frac{2q{N}_B}{K_s{\epsilon }_0}(\pm 2{\varphi }_F\mp V_{BS})}(18.26)$

(upper sign n-channel, $V_{BS}<0$; lower sign p-channel, $V_{BS}>0$; $N_B=N_A$ or $N_D$.) Gate-to-source is $V_{GS}=V_{GB}+V_{BS}$, so the $-V_{BS}$ term cancels:

$V_{GS}{|}_{th}=2{\varphi }_F\pm \frac{K_s}{K_O}{x}_o\sqrt{\frac{2q{N}_B}{K_s{\epsilon }_0}(\pm 2{\varphi }_F\mp V_{BS})}(18.27)$

Define $\Delta V_T=V_{GS}{|}_{th}-V_T^{\prime }$, where $V_T^{\prime }$ is (18.22) at $V_{BS}=0$. Write $V_2\equiv (K_s/K_O)x_o\sqrt{4q{N}_B|{\varphi }_F|/K_s{\epsilon }_0}$, the second term of $V_T^{\prime }$ (n-channel) at $V_{BS}=0$. Then, since $\sqrt{2{\varphi }_F-V_{BS}}=\sqrt{2{\varphi }_F}\sqrt{1-V_{BS}/2{\varphi }_F}$,

$\boxed{\Delta V_T=V_2\left[\sqrt{1-\frac{V_{BS}}{2{\varphi }_F}}-1\right]}\{\begin{array}{ll}{\varphi }_F>0,V_{BS}<0& \text{n-channel}\\ {\varphi }_F<0,V_{BS}>0& \text{p-channel}\end{array}(18.28)$

with the sign conventions that make $V_{BS}/2{\varphi }_F<0$ in both cases. Observations:

1. Back biasing always increases the magnitude of the ideal threshold: n-channel more positive, p-channel more negative. It cannot be used to reduce the negative threshold of a p-channel MOSFET.
2. The Chapter 17 current-voltage relations remain valid for $V_{BS}\ne 0$ with $2{\varphi }_F\to 2{\varphi }_F-V_{BS}$, $V_G\to V_{GS}$, $V_D\to V_{DS}$, and $V_T$ interpreted as $V_{GS}{|}_{th}$.
3. Use double-subscripted voltages carefully so the correct voltage differences are identified.

18.3.5 Threshold summary

• All nonidealities shift the MOSFET threshold; interface traps in addition degrade the low-frequency $g_m$.
• Procedure for a real $V_T$: (i) find $V_{FB}$ from known nonideality information; (ii) add it to the threshold of an ideal version of the device, $V_T=V_T^{\prime }+V_{FB}$.
• A transistor “off” at $V_G=0$ is enhancement mode; one that conducts at $V_G=0$ is depletion mode. Because of residual nonidealities real n-channel MOSFETs tend to be depletion mode.
• Enhancement-mode NMOS and threshold adjustment in general are now achieved by ion implantation; back biasing is also used.

Exercise 18.6

Problem. The $C$-$V_G$ ($V_D=0$) characteristic of an n-channel MOSFET (Fig. E18.6) shows flat band at $V_G=-2.2$ V and the capacitance rising back to $C=C_O$-like inversion level near $V_G=-1$ V. (a) What is $V_T$? (b) Depletion or enhancement mode? (c) Sketch the $I_D$-$V_D$ family for $V_G=-2,-1,0,1,2$ V. (d) Given ${\varphi }_{MS}=-1$ V, $Q_{IT}=0$, and BT stability, explain the flat-band voltage of $-2.2$ V. (e) For ${\varphi }_F=0.3$ V, what $V_{BS}$ gives $V_{GS}{|}_{th}=1$ V?

Solution.

(a) In going toward positive gate bias the high-frequency/low-frequency $C$-$V$ rises toward $C_O$ at about the depletion-to-inversion transition. $V_G$ at that transition is the MOSFET threshold: $V_T\approx -1$ V.

(b) $V_T=-1$ V $<0$ so the device conducts at $V_G=0$: depletion mode.

(c) Qualitative family: curves for $V_G=-2,-1$ V show (essentially) no current (the device is off, $V_G\le V_T$); curves for $V_G=0,1,2$ V are ordinary MOSFET curves with saturation, ordered upward: $V_G=0$ lowest, $V_G=2$ V highest, with saturation voltage $V_{Dsat}=V_G-V_T=1,2,3$ V respectively.

(d) BT stable means $Q_M=0$; $Q_{IT}=0$ is given; ${\varphi }_{MS}=-1$ V cannot account for the whole $-2.2$ V; the remaining shift is due to the fixed charge:

$-\frac{Q_F}{C_O}=V_{FB}-{\varphi }_{MS}=-2.2+1.0=-1.2\text{ V}\Rightarrow Q_F>0\text{ and }{Q}_F=1.2C_O.$

(e) Solve (18.28) for $V_{BS}$:

$\frac{\Delta V_T}{V_2}+1=\sqrt{1-\frac{V_{BS}}{2{\varphi }_F}}\Rightarrow V_{BS}=2{\varphi }_F\left[1-{\left(1+\frac{\Delta V_T}{V_2}\right)}^2\right]$

Needed shift: $\Delta V_T=1-(-1)=2$ V. $V_2$ from $V_T=V_T^{\prime }+V_{FB}$: $V_T^{\prime }=V_T-V_{FB}=-1.0+2.2=1.2$ V, and $V_2=V_T^{\prime }-2{\varphi }_F=1.2-0.6=0.6$ V.

$V_{BS}=0.6\left[1-{\left(1+\frac{2}{0.6}\right)}^2\right]=0.6[1-18.78]=-10.7\text{ V}$

Answer: $V_{BS}\approx -10.7$ V.

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Chapter Summary

1. Work-function difference. ${\varphi }_{MS}=[({\Phi }_M^{\prime }-{\chi }^{\prime })-(E_C-E_F{)}_{FB}]/q$ rigidly shifts the $C$-$V$ curve by ${\varphi }_{MS}$ (usually a negative fraction of a volt to a volt).
2. Oxide charge. For any distribution, $\Delta V_G=-\frac{1}{K_O{\epsilon }_0}{\int }_0^{x_o}x{\rho }_{ox}dx$. Charge near the semiconductor weighs the most.
3. Mobile ions (Na${}^{+}$): shift depends on position (${\gamma }_M$) and move under BT stress, causing instability. Cured by clean processing, phosphorus stabilization, chlorine neutralization.
4. Fixed charge $Q_F$: positive, at the interface, shift $-Q_F/C_O$, depends on orientation (111:100 about 3:1) and terminal oxidation, minimized by an inert anneal; probably excess Si.
5. Interface traps $Q_{IT}({\varphi }_s)$: dangling bonds; stretch out the $C$-$V$ curve and lower $g_m$; reduced by hydrogen (postmetallization or ambient) annealing.
6. Radiation and negative-bias stress raise apparent $Q_F$ and $Q_{IT}$.
7. Total shift: $\Delta V_G={\varphi }_{MS}-Q_F/C_O-{\gamma }_M{Q}_M/C_O-Q_{IT}({\varphi }_s)/C_O$.
8. Threshold: $V_T=V_T^{\prime }+V_{FB}$; real n-channel devices tend to be depletion mode; ion implantation ($\Delta V=-Q_I/C_O$) and back bias ($\Delta V_T=V_2[\sqrt{1-V_{BS}/2{\varphi }_F}-1]$) adjust it; field oxide prevents parasitic channels.

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Computer-Based Exercise (Problem 18.3 logic)

Goal. Plot ${\varphi }_{MS}$ versus doping for Al-gate and n${}^{+}$ poly-gate structures (as in Fig. 18.3) and for p${}^{+}$ poly-gate ($E_F=E_V$).

Logic.

1. Build a log-spaced doping vector $N$ from $10^{14}$ to $10^{18}$ cm${}^{-3}$.
2. For n-type: $(E_C-E_F{)}_{FB}=E_G/2-kT\ln (N_D/n_i)$. For p-type: $(E_C-E_F{)}_{FB}=E_G/2+kT\ln (N_A/n_i)$.
3. ${\varphi }_{MS}=({\Phi }_M^{\prime }-{\chi }^{\prime })-(E_C-E_F{)}_{FB}$ (in volts, with energies in eV).
4. Inputs: Al: $-0.03$ eV; n${}^{+}$ poly: $-0.18$ eV; p${}^{+}$ poly with $E_F=E_V$: $E_G=1.12$ eV.
5. Plot against ${\log }_{10}N$, with curves for gate on n-Si and on p-Si.

% Work-function difference versus doping (Fig. 18.3 and p+ poly)
kT = 0.0259; EG = 1.12; ni = 1e10;
N  = logspace(14, 18, 200);                 % cm^-3
 
EcEf_n = EG/2 - kT*log(N/ni);               % n-type Si: Ec - EF at flat band
EcEf_p = EG/2 + kT*log(N/ni);               % p-type Si
 
gates = struct('name', {'Al', 'n+ poly', 'p+ poly (EF=Ev)'}, ...
               'phi',  {-0.03, -0.18, EG});  % PhiM' - chi' in eV
 
figure; hold on; grid on;
styles = {'b-','r-','k-'};
for g = 1:numel(gates)
    phiMS_n = gates(g).phi - EcEf_n;        % volts (eV/q)
    phiMS_p = gates(g).phi - EcEf_p;
    semilogx(N, phiMS_n, styles{g}, 'LineWidth', 1.5, ...
        'DisplayName', [gates(g).name ' on n-Si']);
    semilogx(N, phiMS_p, [styles{g}(1) '--'], 'LineWidth', 1.5, ...
        'DisplayName', [gates(g).name ' on p-Si']);
end
set(gca,'XScale','log');
xlabel('N_A or N_D (cm^{-3})'); ylabel('\phi_{MS} (V)');
title('Metal-semiconductor work-function difference');
legend('Location','best');

Check: Al on p-Si at $10^{15}$: $-0.03-0.858=-0.89$ V, matching the figure’s about $-0.9$ V. Al on n-Si at $10^{15}$: $-0.03-0.262=-0.29$ V. n${}^{+}$ poly on p-Si at $10^{15}$: $-0.18-0.858=-1.04$ V.

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End-of-Chapter Problems

Problem information (from the book’s table): 18.1 quick quiz; 18.2 polysilicon-gate MOS-C; 18.3 ${\varphi }_{MS}$ versus doping plot (computer); 18.4 mobile ion calculation; 18.5 fixed charge calculation; 18.6 ${\varphi }_{MS}$ and $Q_F$ from a $V_{FB}$ plot; 18.7 charge information from a band diagram; 18.8 $Q_F$ from $C$-$V$ data; 18.9 sketch of a pre-annealed $C$-$V$; 18.10 dangling-bond calculation; 18.11 single-level interfacial trap; 18.12 half-irradiated MOS-C; 18.13 BT-stressed MOSFET; 18.14 modifications to $V_T$; 18.15 compute MOSFET $V_T$; 18.16 required implant dose.

Where the OCR dropped an exponent or a figure is unavailable, the assumption used is stated in the solution.

Problem 18.1 Quick quiz

(a) Difference between ${\Phi }_M-\chi$ and ${\Phi }_M^{\prime }-{\chi }^{\prime }$? ${\Phi }_M$ and $\chi$ are the metal work function and the Si electron affinity measured to the vacuum level. ${\Phi }_M^{\prime }$ and ${\chi }^{\prime }$ are the barrier heights from the metal Fermi level and from the Si conduction band edge to the oxide conduction band. The oxide lowers both by the same amount, so ${\Phi }_M^{\prime }-{\chi }^{\prime }={\Phi }_M-\chi$.

(b) What is a bias-temperature stress? Heating the device (about 100 to 250 ${}^{\circ }$C) while holding a constant gate bias (positive or negative) for some time, then cooling to room temperature with the bias on, and measuring the $C$-$V$ or $I$-$V$ again. It tests whether charges (mobile ions) move.

(c) Origin of fixed oxide charge. Excess ionic silicon (incompletely oxidized SiO${}_x$, $x<2$) at the Si-SiO${}_2$ interface, left when oxidation stops.

(d) $D_{it}$ orientation dependence. $\{111\}$ highest, $\{100\}$ lowest, ratio about 3:1 at midgap.

(e) Net effect of ionizing radiation. Creates oxide trapped holes (apparent increase in $Q_F$, positive) and new interface traps: negative shift and stretch-out of the $C$-$V$ curve.

(f) Distinguishing negative-bias instability from alkali ions. After a negative BT stress, alkali ions move to the metal and the $C$-$V$ curve shifts positively (back toward theory); negative-bias instability shifts the curve more negative (and distorts it, with a $D_{it}$ midgap peak).

(g) When is $V_T\ne V_T^{\prime }+V_{FB}$? When $Q_{IT}(2{\varphi }_F)\ne Q_{IT}(0)$, i.e. when the interface trap charge differs appreciably between flat band and threshold (large trap densities).

(h) Depletion-mode transistor. One that conducts (has a channel) at $V_G=0$; a gate voltage of the appropriate polarity is required to turn it off.

(i) Field oxide versus gate oxide. The gate oxide is the thin oxide under the gate in the active region; the field oxide is the much thicker oxide over non-gated regions, thick enough that $V_T(\text{field})$ is too large for the field region to invert at circuit voltages (preventing parasitic channels).

Problem 18.2 Polysilicon-gate MOS-C

Problem. A poly-Si gate MOS-C has $E_F-E_C=0.2$ eV in the heavily doped gate (Fermi level 0.2 eV above $E_C$) and $E_F-E_i=-0.2$ eV in the nondegenerately doped substrate (a p-type substrate, $E_i-E_F=0.2$ eV; the OCR dropped the subscripts). The structure is ideal except ${\varphi }_{MS}\ne 0$ and ${\chi }^{\prime }(\text{poly})={\chi }^{\prime }(\text{Si})$. (a) Sketch the flat-band energy band diagram. (b) Find ${\varphi }_{MS}$. (c) Accumulation, depletion or inversion at $V_G=0$?

Solution.

(b) Using ${\varphi }_{MS}=[(E_C-E_F{)}_{poly}-(E_C-E_F{)}_{Si}]/q$ (Eq. 18.24):

$(E_C-E_F{)}_{poly}=-0.2\text{ eV}$ $(E_C-E_F{)}_{Si}=(E_C-E_i)+(E_i-E_F)=0.56+0.2=0.76\text{ eV}$ ${\varphi }_{MS}=\frac{-0.2-0.76}{1}=-0.96\text{ V}$

(a) Flat band means the semiconductor bands are flat, while the gate is at $V_G={\varphi }_{MS}=-0.96$ V. So the metal (poly) Fermi level lies 0.96 eV above the Si Fermi level: $E_{FM}-E_{FS}=-q{V}_G=+0.96$ eV. Draw: flat Si bands with $E_F$ 0.2 eV below $E_i$ ($E_i$ at midgap), $E_C$ 0.76 eV above $E_F$; the oxide conduction band as a straight sloping line; poly-Si $E_C$ lying 0.2 eV below $E_F$ (degenerate), and $E_{FM}$ 0.96 eV above $E_{FS}$ (the oxide band slopes down toward the semiconductor so that the oxide conduction band offset to the gate side is lower by ${\varphi }_{MS}$ relative to the semiconductor side).

(c) $V_G=0$ is $|{\varphi }_{MS}|=0.96$ V above flat band: $V_G-V_{FB}=+0.96$ V. For a p-type substrate, positive $V_G-V_{FB}$ depletes and may invert. Determine which: $N_A=n_i{e}^{0.2/0.0259}=2.25\times 10^{13}$ cm${}^{-3}$; $2{\varphi }_F=0.40$ V. With an assumed $x_o=0.1\mu$m ($C_O=3.45\times 10^{-8}$ F/cm${}^2$):

$V_T^{\prime }-V_{FB}\text{-offset}=2{\varphi }_F+\frac{\sqrt{2K_s{\epsilon }_{0}q{N}_A(2{\varphi }_F)}}{C_O}=0.40+\frac{\sqrt{2(11.8)(8.85\times 10^{-14})(1.6\times 10^{-19})(2.25\times 10^{13})(0.40)}}{3.45\times 10^{-8}}$ $=0.40+\frac{1.73\times 10^{-9}}{3.45\times 10^{-8}}=0.40+0.05=0.45\text{ V}$

Since $0.96\text{ V}>0.45\text{ V}$ (threshold above flat band), the surface is inverted at $V_G=0$ (assumption: ordinary oxide thickness of about 0.1 micron or less; an extremely thick oxide would give depletion).

Problem 18.3 Computer problem

Problem. With ${\Phi }_M^{\prime }-{\chi }^{\prime }$ as input, write a program that plots ${\varphi }_{MS}$ versus doping like Fig. 18.3; confirm the Al and n${}^{+}$ poly plots; also plot for p${}^{+}$ poly with $E_F=E_V$.

Solution. The logic and code are in the section “Computer-Based Exercise” above. Confirmation of the plotted values: at $N=10^{15}$ cm${}^{-3}$

Gate	on n-Si	on p-Si
Al ($-0.03$ eV)	$-0.03-0.262=-0.29$ V	$-0.03-0.858=-0.89$ V
n${}^{+}$ poly ($-0.18$ eV)	$-0.18-0.262=-0.44$ V	$-0.18-0.858=-1.04$ V
p${}^{+}$ poly ($1.12$ eV)	$1.12-0.262=+0.86$ V	$1.12-0.858=+0.26$ V

These match Fig. 18.3 (Al on p-Si about $-0.9$ V; n${}^{+}$ poly on p-Si about $-1.0$ V), and the p${}^{+}$ poly curves are positive for both substrate types.

Problem 18.4 Mobile-ion calculation

Problem. (a) A uniform sodium distribution ${\rho }_{ion}(x)={\rho }_0$ over the oxide, ${\rho }_0/q=10^{16}$ cm${}^{-3}$ (assumed; the OCR dropped the exponent), $x_o=0.1\mu$m. Compute $\Delta V_G$. (b) After $+$BT stress all ions pile up at the oxide-semiconductor interface; find $\Delta V_G$.

Solution.

(a) From (18.13):

$\Delta V_G=-\frac{1}{K_O{\epsilon }_0}{\int }_0^{x_o}x{\rho }_{0}dx=-\frac{{\rho }_0{x}_o^2}{2K_O{\epsilon }_0}$

Total ionic charge: $Q_M={\rho }_0{x}_o=(1.6\times 10^{-19})(10^{16})(10^{-5})=1.6\times 10^{-8}$ C/cm${}^2$ ($Q_M/q=10^{11}$ cm${}^{-2}$).

$\Delta V_G=-\frac{Q_M}{2C_O}=-\frac{1.6\times 10^{-8}}{2(3.45\times 10^{-8})}=-0.23\text{ V}$

(for general ${\rho }_0$: $\Delta V_G=-0.23\text{ V}\times \frac{{\rho }_0/q}{10^{16}{\text{ cm}}^{-3}}$.)

(b) All charge at $x=x_o$: $\Delta V_G=-Q_M/C_O=-\frac{1.6\times 10^{-8}}{3.45\times 10^{-8}}=-0.46\text{ V}$ (twice the uniform value, as the centroid moves from $x_o/2$ to $x_o$).

Problem 18.5 Fixed charge distributed near the interface

Problem. Suppose the fixed charge is not a $\delta$-sheet but spread over a short distance $\Delta x$ from the Si-SiO${}_2$ interface. (a) Give the standard $\Delta V_G(\text{fixed charge})$. (b) Find $\Delta V_G$ for a charge that increases linearly from zero at distance $\Delta x$ from the interface to $2Q_F/\Delta x$ right at the interface (total charge $Q_F$). (c) Compute the ratio (b)/(a) for $\Delta x=10$ A $=10^{-7}$ cm and $x_o=0.1\mu$m.

Solution.

(a) $\Delta V_G=-Q_F/C_O$.

(b) With $x$ measured from the metal, the distribution is zero for $x<x_o-\Delta x$ and, for $x_o-\Delta x\le x\le x_o$,

$\rho (x)=\frac{2Q_F}{\Delta x^2}[x-(x_o-\Delta x)]$

(check: at $x=x_o$, $\rho =2Q_F/\Delta x$; total $=\frac{1}{2}\cdot \frac{2Q_F}{\Delta x}\Delta x=Q_F$.) Let $u=x-(x_o-\Delta x)$, $0\le u\le \Delta x$:

$\int x\rho dx=\frac{2Q_F}{\Delta x^2}{\int }_0^{\Delta x}(x_o-\Delta x+u)udu$ $=\frac{2Q_F}{\Delta x^2}\left[(x_o-\Delta x)\frac{\Delta x^2}{2}+\frac{\Delta x^3}{3}\right]$ $=Q_F\left[(x_o-\Delta x)+\frac{2\Delta x}{3}\right]=Q_F\left(x_o-\frac{\Delta x}{3}\right)$

$\Delta V_G=-\frac{1}{K_O{\epsilon }_0}{Q}_F\left(x_o-\frac{\Delta x}{3}\right)=-\frac{Q_F}{C_O}\left(1-\frac{\Delta x}{3x_o}\right)$

(Centroid of the triangle sits $\Delta x/3$ from the interface.)

(c)

$\frac{\Delta V_G(b)}{\Delta V_G(a)}=1-\frac{\Delta x}{3x_o}=1-\frac{10^{-7}}{3(10^{-5})}=1-0.0033=0.9967$

So treating $Q_F$ as a $\delta$-sheet is excellent (error 0.3%).

Problem 18.6 ${\varphi }_{MS}$ and $Q_F$ from a $V_{FB}$ versus $x_o$ plot

Problem. Ideal devices except ${\varphi }_{MS}\ne 0$ and $Q_F\ne 0$. (a) Show how ${\varphi }_{MS}$ and $Q_F$ follow from $V_{FB}$ vs $x_o$. (b) Determine them from the data below.

$x_o$ ($\mu$m)	0.1	0.15	0.2	0.25	0.3
$V_{FB}$ (V)	$-0.91$	$-1.04$	$-1.20$	$-1.33$	$-1.52$

Solution.

(a) $V_{FB}={\varphi }_{MS}-Q_F/C_O$ with $C_O=K_O{\epsilon }_0/x_o$:

$V_{FB}={\varphi }_{MS}-\frac{Q_F}{K_O{\epsilon }_0}{x}_o$

A straight line in $x_o$: intercept at $x_o=0$ is ${\varphi }_{MS}$; slope is $-Q_F/K_O{\epsilon }_0$, so $Q_F=-(\text{slope})K_O{\epsilon }_0$.

(b) Least-squares line. Means: $\bar{x}=0.20\mu$m, $\bar{y}=(-0.91-1.04-1.20-1.33-1.52)/5=-1.20$ V.

$S_{xx}=\sum (x-\bar{x}{)}^2=0.01+0.0025+0+0.0025+0.01=0.025$ $S_{xy}=(-0.1)(0.29)+(-0.05)(0.16)+0+(0.05)(-0.13)+(0.1)(-0.32)=-0.029-0.008-0.0065-0.032=-0.0755$ $\text{slope}=\frac{S_{xy}}{S_{xx}}=-3.02\text{ V}/\mu \text{m}=-3.02\times 10^4\text{ V/cm}$ $\text{intercept}=\bar{y}-\text{slope}\cdot \bar{x}=-1.20+3.02(0.2)=-0.60\text{ V}$

${\varphi }_{MS}\approx -0.60\text{ V}$ $Q_F=(3.02\times 10^4)(3.9)(8.85\times 10^{-14})=1.04\times 10^{-8}{\text{ C/cm}}^2$ $\frac{Q_F}{q}=\frac{1.04\times 10^{-8}}{1.6\times 10^{-19}}=6.5\times 10^{10}{\text{ cm}}^{-2}$

Problem 18.7 Charge information from a band diagram

Problem. An MOS-C is characterized by the band diagram of Fig. P18.7 (negligible interface traps). (a) $Q_M=0$ or $\ne 0$? (b) $Q_F=0$ or $\ne 0$?

Solution. (The figure is not available; the reading rules are stated and applied to the diagram as in Exercise 18.3, with metal $E_F$ above semiconductor $E_F$ and straight oxide bands.)

(a) Oxide band curvature measures oxide charge: $d^2{E}_C/d{x}^2\propto {\rho }_{ox}$. Straight oxide bands (constant oxide field) mean ${\rho }_{ox}=0$, so $Q_M\approx 0$. (If the bands were curved, ionic charge would be present.)

(b) Compare the oxide field with the semiconductor-surface displacement field: if $K_O{\mathcal{E}}_{ox}\ne K_s{\mathcal{E}}_s$ there is interface charge. With negligible $Q_{IT}$ and no stress, that charge is the fixed charge: $Q_F=K_s{\epsilon }_0{\mathcal{E}}_s-K_O{\epsilon }_0{\mathcal{E}}_{ox}$. For the diagram, where the oxide field is smaller than $K_s{\mathcal{E}}_s/K_O$ (a discontinuity of $D$ at the interface), $Q_F>0$, so $Q_F\ne 0$.

Problem 18.8 $Q_F$ from $C$-$V$ data

Problem. An Al-SiO${}_2$-Si capacitor at 300 K has $C_{MAX}=200$ pF, $C_{MIN}=67$ pF, $V_{FB}=-0.71$ V, $Q_M=0$, $Q_{IT}=0$, gate area $A_G=2.9\times 10^{-3}$ cm${}^2$. (a) Sketch the ideal-device $C$-$V$ on a copy of the figure and mark its flat-band point. (b) Find the Si doping (delta-depletion formulation). (c) Find $Q_F$.

Solution.

(a) The ideal device (${\varphi }_{MS}=0$, $Q_F=0$) has the same $C_{MAX}$, $C_{MIN}$ and shape, shifted rigidly by $\Delta V_G=V_{FB}-0$: the ideal curve is the measured curve moved right by $0.71$ V (dashed line), with its flat-band point at $V_G=0$ at the same flat-band capacitance $C_{FB}$ (between $C_{MIN}$ and $C_{MAX}$, close to $C_{MAX}$ at the knee).

(b) $C_O=C_{MAX}/A_G=\frac{200\times 10^{-12}}{2.9\times 10^{-3}}=6.90\times 10^{-8}$ F/cm${}^2$, so

$x_o=\frac{K_O{\epsilon }_0}{C_O}=\frac{3.45\times 10^{-13}}{6.90\times 10^{-8}}=5.0\times 10^{-6}\text{ cm}=500\text{ A˚}$

Delta-depletion: $\frac{C_{MIN}}{C_O}=\frac{1}{1+(K_O/K_s)(W_T/x_o)}$, so

$W_T=\frac{K_s}{K_O}{x}_o\left(\frac{C_O}{C_{MIN}}-1\right)=\frac{11.8}{3.9}(5\times 10^{-6})\left(\frac{200}{67}-1\right)=(3.026)(5\times 10^{-6})(1.985)=3.0\times 10^{-5}\text{ cm}$

Now $W_T=\sqrt{4K_s{\epsilon }_0{\varphi }_F/(qN)}$ with ${\varphi }_F=kT\ln (N/n_i)$; iterate. $N=10^{16}$: ${\varphi }_F=0.358$, $W_T=3.06\times 10^{-5}$ cm; $N=1.05\times 10^{16}$: ${\varphi }_F=0.359$, $W_T=2.99\times 10^{-5}$ cm. So

$N\approx 1.03\times 10^{16}{\text{ cm}}^{-3}\approx 10^{16}{\text{ cm}}^{-3}$

Which type? $V_{FB}={\varphi }_{MS}-Q_F/C_O$ with $Q_F>0$. For an Al gate on p-Si at $10^{16}$, ${\varphi }_{MS}\approx -0.03-(0.56+0.358)=-0.95$ V, which is already more negative than $-0.71$ V and would need $Q_F<0$, impossible. Therefore the substrate is n-type: $N_D\approx 10^{16}$ cm${}^{-3}$.

(c) n-Si: $(E_C-E_F)=0.56-0.359=0.201$ eV, so ${\varphi }_{MS}=-0.03-0.201=-0.23$ V.

$-\frac{Q_F}{C_O}=V_{FB}-{\varphi }_{MS}=-0.71+0.23=-0.48\text{ V}$ $Q_F=0.48(6.90\times 10^{-8})=3.3\times 10^{-8}{\text{ C/cm}}^2,\frac{Q_F}{q}=2.1\times 10^{11}{\text{ cm}}^{-2}$

Problem 18.9 Sketch the pre-anneal $C$-$V$

Problem. The $C$-$V$ of an MOS-C is measured before and after a postmetallization anneal that eliminates interface traps. The AFTER curve is in Fig. P18.9. Assuming acceptor-like interface traps, sketch the BEFORE curve.

Solution. (Assume the figure shows a p-bulk device with accumulation on the left; the n-bulk case is mirrored below.)

Acceptor-like traps are neutral when empty and negative ($Q_{IT}<0$) when filled; they fill when the surface Fermi level lies above them. Using $\Delta V_G=-Q_{IT}/C_O$:

• p-bulk. In accumulation ($E_F$ near $E_V$) all acceptor-like traps are empty: $Q_{IT}=0$, no shift. Moving through depletion toward inversion ($E_F$ rising toward $E_C$), more traps fill: $Q_{IT}$ increasingly negative, so $\Delta V_G=-Q_{IT}/C_O$ increasingly positive. So the BEFORE curve coincides with the AFTER curve in accumulation and is progressively displaced to the right in depletion and inversion: the transition to $C_{MIN}$ is stretched out toward positive voltage, with the rise at the inversion end (for low-frequency) displaced the most. The flat-band point is shifted by the (small) trap charge at flat band.
• n-bulk (mirror): inversion side coincides with AFTER, and accumulation/depletion is displaced to the right the most; the curve is stretched out on the left side.

In both cases the BEFORE curve is the AFTER curve stretched out along the voltage axis, with the displacement growing with the number of filled traps; the capacitance extremes ($C_{MAX}$, $C_{MIN}$) are unchanged.

Problem 18.10 Dangling bonds: (100) versus (110)

Problem. If interface traps come from dangling bonds in proportion to the Si surface atom density, which plane, (100) or (110), has the higher interface trap density?

Solution. Surface atom density from the lattice constant $a=5.43$ A $=5.43\times 10^{-8}$ cm ($a^2=2.95\times 10^{-15}$ cm${}^2$). In the conventional fcc cell:

• (100) face: area $a^2$, containing $4\times \frac{1}{4}+1=2$ atoms: ${\sigma }_{100}=2/a^2=6.8\times 10^{14}$ cm${}^{-2}$ (agrees with the text).
• (110) plane: rectangle $a\times \sqrt{2}a$, area $\sqrt{2}{a}^2$, containing $4\times \frac{1}{4}+2\times \frac{1}{2}=2$ atoms: ${\sigma }_{110}=\frac{2}{\sqrt{2}{a}^2}=\frac{\sqrt{2}}{a^2}=4.8\times 10^{14}$ cm${}^{-2}$.

$\frac{{\sigma }_{100}}{{\sigma }_{110}}=\sqrt{2}\approx 1.41$

Answer: (100) has the higher density of surface atoms, hence of dangling bonds and interface traps, by a factor of about 1.4.

Problem 18.11 Single-level interfacial trap at midgap (n-bulk, high-frequency)

Problem. An n-bulk MOS-C has interface traps only at one energy $E_i$ (midgap), with density $N_{it}$ large enough to matter. Sketch the HF $C$-$V$ for (a) donor-like states; (b) acceptor-like states; (c) donor-like with the level near $E_C$ ($E_C-E_{trap}=0.001$ eV); (d) donor-like with the level near $E_V$ ($E_{trap}-E_V=0.001$ eV).

Solution. The key: a trap level is charged only when the surface Fermi level is on the “charged” side of it. At the surface $E_F$ passes the level exactly where ${\varphi }_s$ equals the midgap value (for n-bulk, $E_F=E_i$ at the surface when the bands bend up by ${\varphi }_F$). As $E_F$ sweeps through the single level, the charge changes by $q{N}_{it}$ essentially at one value of ${\varphi }_s$. Because ${\varphi }_s$ cannot move while that charge is being added, the gate voltage must change by $\Delta V=q{N}_{it}/C_O$ with ${\varphi }_s$ (hence $C$) pinned. So the $C$-$V$ has a horizontal plateau at the capacitance corresponding to midgap surface potential, of width $q{N}_{it}/C_O$ in volts.

(a) Donor-like (positive when empty). For n-bulk: accumulation and depletion down to midgap, $E_F>E_i$: level filled, neutral. In inversion, $E_F<E_i$: empty, positive. So the curve is the ideal one in accumulation and depletion, then a plateau at the midgap capacitance, then the ideal curve continues but displaced to the left (negative) by $q{N}_{it}/C_O$ in inversion (positive charge lowers the required gate voltage: $\Delta V=-Q_{IT}/C_O<0$).

(b) Acceptor-like (negative when filled). Filled for $E_F>E_i$: accumulation and depletion have $Q_{IT}=-q{N}_{it}$, so $\Delta V=+q{N}_{it}/C_O$: displaced to the right; inversion side is neutral and unshifted. Plateau again at midgap capacitance. So relative to the ideal curve the inversion branch is in its normal place and the accumulation/depletion branch is displaced right.

(c) Donor-like level at $E_C-0.001$ eV. It is positive whenever $E_F$ is below the level, which is true for essentially all gate voltages (bulk $E_F$ is far below $E_C$), becoming neutral only in extreme accumulation. So $Q_{IT}=+q{N}_{it}$ over the whole practical range: the curve is a rigid shift to the left by $q{N}_{it}/C_O$ with the plateau lying beyond the accumulation end (not seen).

(d) Donor-like level at $E_V+0.001$ eV. It is filled (neutral) whenever $E_F$ is above it, true for every bias except extreme inversion ($E_F$ at the valence band edge). So there is essentially no distortion: the ideal curve, with any plateau at the extreme inversion end (very strong inversion) beyond practical range.

Problem 18.12 Half-irradiated MOS-C

Problem. After fabrication exactly half the gate area is irradiated, raising the apparent $Q_F$ there; $D_{it}$ is unaffected. Sketch the $C$-$V$ after irradiation and explain.

Solution. Treat the device as two parallel capacitors of area $A/2$ each: the unirradiated half with the original characteristic $C_0(V_G)$, and the irradiated half with the same characteristic shifted along the voltage axis by

$\Delta V_G=-\frac{\Delta Q_F}{C_O}<0(\text{to the left; toward negative }{V}_G)$

Total capacitance (parallel combination):

$C(V_G)=\frac{1}{2}{C}_0(V_G)+\frac{1}{2}{C}_0(V_G-\Delta V_G)$

So the new curve is the average of the original and a left-shifted copy:

• Far from the transition (deep accumulation, deep inversion at high frequency) both halves agree: $C=C_{MAX}$ or $C_{MIN}$, unchanged.
• In the transition region the irradiated half makes its transition at a more negative voltage (for p-type: accumulation to depletion, and so on), so there is an intermediate range of width $|\Delta V_G|$ where one half has fallen toward $C_{MIN}$ and the other is still near $C_{MAX}$: a shoulder (or step) near $C\approx (C_{MAX}+C_{MIN})/2$.
• Overall: a stretched-out characteristic, with the flat-band point and the whole transition broadened by $|\Delta V_G|$, equal to the original curve on the positive side and the shifted curve on the negative side joined by the shoulder.

Problem 18.13 BT-stressed MOSFET

Problem. Before $+$BT, the $I_D$-$V_D$ of a (p-channel) MOSFET is as in Fig. P18.13(a) (curves for $V_G=-2,-3,-4$ V); the $g_m$-$V_G$ before and after $+$BT is in (b). (a) Probable cause of the $g_m$ shift? (b) Sketch the post-stress $I_D$-$V_D$ for $V_G=-2,-3,-4$ V and explain.

Solution.

(a) After positive BT stress the $g_m$-$V_G$ curve moves toward more negative $V_G$ (the threshold becomes more negative). A negative shift after positive stress is the signature of mobile positive ions (Na${}^{+}$) drifting to the Si-SiO${}_2$ interface (large $|\Delta V_G|={\gamma }_M{Q}_M/C_O$). (Interface traps would additionally degrade the peak of $g_m$, and the shape here is mainly translated.)

(b) Translation of the threshold by $\Delta V_T=-\Delta$ ($\Delta >0$; from the figure assume $\Delta \approx 1$ V) changes the gate overdrive: after stress, $V_G-V_T$ is smaller by $\Delta$ at the same gate voltage. The characteristic of gate voltage $V_G$ after stress equals the pre-stress curve at $V_G+\Delta$ (i.e. less negative by $\Delta$). So with $\Delta =1$ V:

After-stress curve at $V_G$	Equals pre-stress curve at
$-2$ V	$-1$ V (at or below threshold: essentially off)
$-3$ V	$-2$ V
$-4$ V	$-3$ V

The shape of each curve is unchanged, but the currents are lower at the same $|V_G|$, and the saturation voltage is $V_{Dsat}=V_G-V_T$ reduced correspondingly. (The magnitude of the shift is read from Fig. P18.13(b); the rule applies for any $\Delta$.)

Problem 18.14 Modifications to an n-channel MOSFET

Problem. An n-channel (p-bulk) MOSFET is ideal except ${\varphi }_{MS}\ne 0$. How does each change, taken independently, affect $V_T$?

Solution. Base expression: $V_T={\varphi }_{MS}+2{\varphi }_F+\sqrt{4K_s{\epsilon }_{0}q{N}_A{\varphi }_F}/C_O$ (with $Q_F=Q_M=Q_{IT}=0$).

(a) Radiation creates apparent $Q_F>0$: $V_{FB}$ gets $-Q_F/C_O$, so $V_T$ decreases (shifts negative).

(b) Al to Cu: ${\Phi }_M^{\prime }-{\chi }^{\prime }$ increases from $-0.03$ to $+0.63$ eV, so ${\varphi }_{MS}$ increases by about $0.66$ V and $V_T$ increases by about $0.66$ V.

(c) Increased substrate doping: $2{\varphi }_F$ and the depletion-charge term increase (strongly), and ${\varphi }_{MS}$ becomes slightly more negative (Fig. 18.3), but the net effect is a positive shift in $V_T$ (the depletion-charge increase dominates).

(d) Thinner oxide: $C_O$ increases, so the depletion-charge term $\sqrt{4K_s{\epsilon }_{0}q{N}_A{\varphi }_F}/C_O$ decreases and $V_T$ decreases toward ${\varphi }_{MS}+2{\varphi }_F$ (no $Q_F$ here to make the shift worse).

(e) Boron implant into the near surface: adds negative charge at the interface, $\Delta V_G=-Q_I/C_O=+q{N}_I/C_O$: $V_T$ increases.

Problem 18.15 Compute MOSFET $V_{FB}$ and $V_T$

Problem. A MOSFET has ${\varphi }_{MS}=-0.46$ V, $Q_F/q=2\times 10^{11}$ cm${}^{-2}$, $Q_M=0$, $Q_{IT}=0$, an implanted ion charge $Q_I/q=-4\times 10^{11}$ cm${}^{-2}$ at the Si-SiO${}_2$ interface (exponents restored from OCR, since $V_{FB}$ then comes out near zero as intended), $x_o=0.05\mu$m, $A=10^{-3}$ cm${}^2$, $N_D=10^{15}$ cm${}^{-3}$. (a) Find $V_{FB}$. (b) Find $V_T$. (c) Enhancement or depletion?

Solution. n-substrate, so p-channel.

$C_O=\frac{(3.9)(8.85\times 10^{-14})}{5\times 10^{-6}}=6.90\times 10^{-8}{\text{ F/cm}}^2$

(a)

$V_{FB}={\varphi }_{MS}-\frac{Q_F}{C_O}-\frac{Q_I}{C_O}$ $\frac{Q_F}{C_O}=\frac{(1.6\times 10^{-19})(2\times 10^{11})}{6.90\times 10^{-8}}=0.464\text{ V}$ $\frac{Q_I}{C_O}=\frac{(1.6\times 10^{-19})(-4\times 10^{11})}{6.90\times 10^{-8}}=-0.928\text{ V}$ $V_{FB}=-0.46-0.464+0.928=+0.004\approx 0\text{ V}$

(b) Ideal p-channel threshold: $|{\varphi }_F|=0.0259\ln (10^{15}/10^{10})=0.298$ V.

$V_T^{\prime }=-\left[2(0.298)+\frac{\sqrt{4K_s{\epsilon }_{0}q{N}_D{\varphi }_F}}{C_O}\right]=-\left[0.596+\frac{\sqrt{4(11.8)(8.85\times 10^{-14})(1.6\times 10^{-19})(10^{15})(0.298)}}{6.90\times 10^{-8}}\right]$ $\sqrt{\cdots }=1.41\times 10^{-8}\Rightarrow \frac{1.41\times 10^{-8}}{6.90\times 10^{-8}}=0.204$ $V_T^{\prime }=-(0.596+0.204)=-0.80\text{ V}$ $V_T=V_T^{\prime }+V_{FB}=-0.80+0.00=-0.80\text{ V}$

(c) A p-channel device with $V_T=-0.80$ V is off at $V_G=0$ and turns on for $V_G<-0.8$ V: enhancement mode.

Problem 18.16 Required implant dose

Problem. An Al-SiO${}_2$-Si n-channel MOSFET, $T=300$ K, $N_A=10^{17}$ cm${}^{-3}$, $x_o=100$ A (assumed; OCR garbled), $Q_F/q=10^{11}$ cm${}^{-2}$ (assumed), no interface traps or mobile ions. Find the boron dose $N_I$ (ions/cm${}^2$, negative charge right at the interface) needed for $V_T=0.5$ V.

Solution.

$C_O=\frac{3.45\times 10^{-13}}{10^{-6}}=3.45\times 10^{-7}{\text{ F/cm}}^2$

Ideal threshold. ${\varphi }_F=0.0259\ln (10^{17}/10^{10})=0.4175$ V, $2{\varphi }_F=0.835$ V.

$\frac{\sqrt{4K_s{\epsilon }_{0}q{N}_A{\varphi }_F}}{C_O}=\frac{\sqrt{4(11.8)(8.85\times 10^{-14})(1.6\times 10^{-19})(10^{17})(0.4175)}}{3.45\times 10^{-7}}=\frac{1.67\times 10^{-7}}{3.45\times 10^{-7}}=0.484\text{ V}$ $V_T^{\prime }=0.835+0.484=1.319\text{ V}$

Flat band without implant. Al on p-Si: $(E_C-E_F)=0.56+0.4175=0.9775$ eV, so ${\varphi }_{MS}=-0.03-0.9775=-1.01$ V.

$\frac{Q_F}{C_O}=\frac{(1.6\times 10^{-19})(10^{11})}{3.45\times 10^{-7}}=0.046\text{ V}$ $V_{FB}=-1.0075-0.046=-1.054\text{ V}$ $V_T(\text{no implant})=1.319-1.054=0.265\text{ V}$

Required implant shift.

$0.5=0.265+\frac{q{N}_I}{C_O}\Rightarrow \frac{q{N}_I}{C_O}=0.235\text{ V}$ $N_I=\frac{0.235C_O}{q}=\frac{0.235(3.45\times 10^{-7})}{1.6\times 10^{-19}}=5.1\times 10^{11}{\text{ ions/cm}}^2$

Answer: about $5\times 10^{11}$ boron ions/cm${}^2$.