C=\frac{C_o}{\sqrt{1+\dfrac{V_G}{V_\delta}}}\qquad\text{(depletion biases)} \tag{16.37}
(Check: .)
A sample set of low- and high-frequency – curves from the delta-depletion analysis is shown in Fig. 16.13 (m, , K, from to V): both curves equal (=1.0 normalised) on the accumulation side, both fall along the same curve (16.37) through depletion, and at the depletion/inversion transition the low-frequency curve returns to 1 while the high-frequency curve levels off at its minimum (about 0.25).
16.4.2 Computations and Observations
Exact Computations
The delta-depletion characteristics (Fig. 16.13) are a rather crude representation of reality. The first-order theory is credible for gate voltages comfortably inside a biasing region but fails badly near the transition points (accumulation to depletion, and depletion to inversion). Practical applications often need more accuracy, obtained from the exact charge distribution (results in Appendix C; the derivation is beyond the text’s scope, but the results are tractable, so highly accurate ideal-structure – curves are easily constructed).
Sample exact-charge curves appear in Figs. 16.14–16.16, showing the effect of doping (16.14), oxide thickness (16.15) and temperature (16.16). Observations:
- Doping (Fig. 16.14, m, n-type and p-type analogues): higher doping causes a significant increase in the high-frequency inversion capacitance and a substantial widening of the depletion bias region. At very high doping the capacitance approaches a bias-independent constant. This is no surprise: as doping increases the semiconductor looks more and more like a metal, and the MOS-C behaves more and more like an ordinary capacitor.
- Oxide thickness (Fig. 16.15, m): thicker oxide also widens the depletion-bias region (a proportionately larger voltage is dropped across the oxide) and affects the high-frequency inversion capacitance (thicker oxide gives a larger minimum).
- Temperature (Fig. 16.16, to C, m, ): a moderate sensitivity of the inversion-bias capacitance and a near insensitivity of the depletion-bias capacitance to temperature.
Exercise 16.5
Problem. (a) Using the exact-charge relationships of Appendix C, write a computer (MATLAB) program that computes and plots low-frequency vs. for stepped in unit increments from to . Use , , K, inputs and only. Set and plot for m; compare with Fig. 16.15. (b) Do the same for high-frequency with m and and compare with Fig. 16.14. (The high-frequency calculation is much more involved.)
Method. Appendix C is outside this excerpt, so I use the standard exact (Boltzmann, equilibrium) MOS results for a p-substrate, with , , :
F(U,U_F)&=\sqrt{e^{-U}+U-1+e^{-2U_F}\left(e^{U}-U-1\right)}\\ \mathcal{E}_s&=\operatorname{sgn}(U)\,\frac{\sqrt2\,(kT/q)}{L_D}\,F\\ V_G&=\phi_s+\frac{K_s}{K_o}x_o\,\mathcal{E}_s\ \ \ (\text{Eq. (16.26) with the exact }\mathcal{E}_s)\\ C_s&=\frac{\sqrt2\,K_s\varepsilon_0}{L_D}\,\frac{\left|1-e^{-U}+e^{-2U_F}\left(e^{U}-1\right)\right|}{2F}\\ \frac{C_{LF}}{C_o}&=\frac{C_s}{C_o+C_s}\quad\text{with}\quad C_o=\frac{K_o\varepsilon_0}{x_o} \end{aligned}$$ Step through $U$ from $U_F-21$ to $U_F+21$ (skipping $U=0$, where $F=0$ and a limit is used), compute $V_G$ and $C_{LF}/C_o$ at each point, and plot $C/C_o$ against $V_G$. In MATLAB: ```matlab NA=1e15; xo=[0.1 0.2 0.3]*1e-4; ni=1e10; kT=0.0259; q=1.6e-19; e0=8.854e-14; Ks=11.8; Ko=3.9; LD=sqrt(Ks*e0*kT/(q*NA)); UF=log(NA/ni); U=(UF-21):0.25:(UF+21); U(U==0)=1e-6; F=sqrt(exp(-U)+U-1+exp(-2*UF)*(exp(U)-U-1)); Cs=sqrt(2)*Ks*e0/LD*abs(1-exp(-U)+exp(-2*UF)*(exp(U)-1))./(2*F); for k=1:3 Co=Ko*e0/xo(k); VG=U*kT+(Ks/Ko)*xo(k)*sign(U).*sqrt(2)*(kT/LD).*F; plot(VG, Cs./(Co+Cs)); hold on end ``` **Numerical results I computed (p-type, $N_A=10^{15}$ cm$^{-3}$, $T=300$ K):** | $x_o$ | flat-band $C/C_o$ | LF exact dip: min $C/C_o$ (at $V_G$) | exact $V_T$ (at $\phi_s=2\phi_F$) | |---|---|---|---| | 0.1 $\mu$m | 0.70 | 0.28 (at 0.87 V) | 1.005 V | | 0.2 $\mu$m | 0.82 | 0.44 (at 1.24 V) | 1.414 V | | 0.3 $\mu$m | 0.87 | 0.54 (at 1.60 V) | 1.823 V | Sample points for $x_o=0.1\ \mu$m: $U=-9.5 o V_G=-10.0$ V, $C/C_o=0.995$; $U=-0.5 o V_G=-0.045$ V, $0.73$; $U=+1.5 o0.11$ V, $0.60$; $U=11.5\ (\phi_F) o0.57$ V, $0.34$; $U=21.5 o0.95$ V, $0.31$; $U=23.5 o1.03$ V, $0.47$; $U=26.5 o1.34$ V, $0.88$; $U=32.5 o10.6$ V, $0.995$. (the $V_T$ values agree with the delta-depletion result: $2\phi_F+\frac{K_s}{K_o}x_o\sqrt{2qN_A(2\phi_F)/(K_s\varepsilon_0)}$ with $2\phi_F=0.596$ V; the exact and delta-depletion $V_T$ coincide because $\phi_s$ is pinned there.) The curves show the depletion region widening and the dip becoming shallower as $x_o$ grows, matching the trends of Fig. 16.15, and the LF curve returning to 1.0 in inversion ($V_G$ beyond about $V_T$) and in accumulation (negative $V_G$ for p-type). For (b), the high-frequency inversion plateau is the depletion capacitance at $W_T$. Delta-depletion values for $x_o=0.1\ \mu$m are, using (16.33): $$\begin{aligned} N_A=10^{14}:&\ W_T=2.50\ \mu\text{m},\ \ C_{min}/C_o=\frac{1}{1+\frac{3.9}{11.8}\frac{2.50}{0.1}}=0.11\\ N_A=10^{15}:&\ W_T=0.88\ \mu\text{m},\ \ C_{min}/C_o=0.26\\ N_A=10^{16}:&\ W_T=0.31\ \mu\text{m},\ \ C_{min}/C_o=0.50 \end{aligned}$$ The exact $V_T$ values ($\phi_s=2\phi_F$) are 0.59, 1.01 and 2.13 V respectively, so the depletion region widens with doping as Fig. 16.14 shows. The exact-charge high-frequency curves land close to these plateaus and reproduce the trend of Fig. 16.14: higher doping gives higher $C_{min}$ and a wider depletion region. The book points the reader to the `MOS_CV` MATLAB file (Appendix M); results should compare favorably with Figs. 16.14 and 16.15. $$\boxed{\text{HF }C_{min}/C_o\approx0.11,\ 0.26,\ 0.50\ \text{for }N_A=10^{14},10^{15},10^{16}\ \text{cm}^{-3}}$$ #### Practical Observations So far we have avoided saying what "low" and "high" frequency mean in real measurements. Would a 100 Hz signal give a low-frequency $C$–$V$ curve? Surprisingly, *no*. In modern MOS-Cs, with long carrier lifetimes and low generation rates, even 10 Hz (the practical limit of bridge-type measurements) gives high-frequency-type characteristics. A genuine low-frequency curve requires indirect means such as the **quasistatic technique**: a slow (typically 10–100 mV/s) linear voltage ramp is applied to the gate while the current into the gate is monitored. The quasistatic displacement current is directly proportional to the low-frequency capacitance, so with calibration the current-vs-voltage data replicates the low-frequency $C$–$V$ curve. On the high side, one cannot let $\omega\to\infty$. Measurement frequencies seldom exceed 1 MHz: at higher frequencies the bulk resistance of the semiconductor lowers the observed capacitance, and at $\gtrsim1$ GHz the response time of majority carriers itself matters. The near-universal standard is **1 MHz**. Even so, high-frequency curves need care. If the d.c. voltage is ramped from accumulation into inversion, the result depends on the ramp rate $R$ (Fig. 16.17: curves for $R=0,0.035,0.096,0.26,2.6$ V/s; the vertical axis is $C/C_o$, the horizontal axis $V_G$ from about $-12$ to $+4$ V). Even at the slowest ramp the inversion part of the true HF curve is not recorded. One must stop the ramp in inversion and let the device equilibrate, or sweep slowly backward from inversion toward accumulation. #### Deep Depletion Let us look at the ramped measurement more closely. In accumulation or depletion only majority carriers are involved and the charge follows the gate bias instantly. On entering inversion, a significant number of *minority* carriers is required for equilibrium. They were not there before, cannot arrive from the distant back contact or across the oxide, and must be *generated* in the near-surface region, a sluggish process. The semiconductor is driven into nonequilibrium (Fig. 16.18a): to balance the charge added to the gate, the depletion width grows beyond $W_T$ to make up for the missing minority carriers. This nonequilibrium state, with a deficit of minority carriers and a depletion width exceeding the equilibrium value, is **deep depletion**. $W>W_T$ explains the *reduced* capacitance in the ramp measurement, and the decrease with faster ramp is logical: the faster the ramp, the fewer minority carriers are generated before a given inversion bias is reached. > **Intuition (the bathtub):** the gate keeps pouring "charge demand" into the tub. Minority carriers are a slow tap. If you pour faster than the tap can deliver, the water level (depletion width) rises above its equilibrium mark, the tub overflows into deep depletion. Stop pouring and the tap catches up, the level falls back. The limiting case is a semiconductor totally devoid of minority carriers, **total deep depletion** (Fig. 16.18b). Apart from the larger depletion width it is exactly the simple depletion state of Fig. 16.12(b), so by the delta-depletion result the capacitance is the depletion-form (16.37) extended to all $V_G$ beyond $V_T$: $$C=\frac{C_o}{\sqrt{1+\dfrac{V_G}{V_\delta}}}\quad\text{total deep depletion}\qquad(V_G>V_T\ \text{p-type};\ V_G<V_T\ \text{n-type}) \tag{16.38}$$ This agrees excellently with experiment and with the exact-charge analysis; the 2.6 V/s curve of Fig. 16.17 is an example. **Applications.** Deep depletion is central to **DRAMs** (deeply depleted MOS-Cs are the storage elements) and **CCDs** (optically generated carrier charge is temporarily stored in partially deep-depleted potential wells under an array of MOS-C gates). ### Exercise 16.6 **Problem.** The experimental $C$–$V$ curve of Fig. E16.6 was observed as follows: the d.c. bias was changed very slowly from point 1 to point 2. At point 2 the $V_G$ sweep rate was increased substantially. On arriving at point 3 the sweep was stopped and the capacitance decayed (rose) to point 4. Qualitatively explain the observed characteristic. **Solution.** 1. **1 to 2 (slow ramp):** the semiconductor equilibrates at each d.c. point, so one traces the standard high-frequency $C$–$V$ curve down to the equilibrium high-frequency minimum $C_{min}$ (at point 2, around the depletion/inversion transition). 2. **2 to 3 (fast ramp):** the semiconductor can no longer equilibrate. It is driven into **deep depletion**: $W>W_T$, so $C$ continues to fall *below* the equilibrium minimum, following the total-deep-depletion curve (16.38). 3. **3 to 4 (sweep stopped):** with $V_G$ fixed, minority carriers (holes for an n-type device) are gradually generated thermally in the near-surface region. They add to the inversion layer, the depletion width shrinks back toward $W_T$, and $C$ increases back to the equilibrium high-frequency value. Equilibrium is systematically restored inside the device through minority-carrier generation. --- ## 16.5 Summary and Concluding Comments This chapter introduced basic MOS terminology, concepts, visualization aids and analytical procedures. We described the MOS capacitor and defined the **ideal MOS structure**. The ideal MOS-C is both a convenient vehicle for MOS fundamentals and the *reference* for analysing more complex real structures; its reference role becomes clearer in Chapter 18, where some idealizations are removed and the resulting perturbations examined. The internal state of the MOS-C under static bias was described qualitatively with energy band and block charge diagrams. With them the terms received a physical meaning: - **Accumulation:** pile-up of majority carriers at the oxide–semiconductor interface. - **Flat band:** no bending of the semiconductor bands (equivalently, no charge in the semiconductor). - **Depletion:** repulsion of majority carriers from the interface, leaving uncompensated impurity ions. - **Inversion:** pile-up of minority carriers at the oxide–semiconductor interface. A remark on terminology: some analyses split the depletion bias region defined here into two sub-regions. In some MOS publications, "depletion" applies only to band bending $0<\phi_s<\phi_F$; **weak inversion** describes $\phi_F<\phi_s<2\phi_F$; and **strong inversion** (more inversion than weak inversion) replaces "inversion" as defined here. Quantitative expressions for charge density, electric field and electrostatic potential were established by solving Poisson's equation. A first-order solution based on the depletion approximation and $\delta$-function modelling of carrier charges was presented; the exact solution is in Appendix B. The formalism was then applied to model the MOS-C $C$–$V$ characteristics in the low- and high-frequency limits. Sample ideal-structure characteristics were examined for parametric dependencies. Finally, the practical meaning of "low" and "high" frequency was clarified, and deep depletion was noted to occur when the MOS-C is not allowed to equilibrate under inversion biasing: a nonequilibrium condition with a deficit of minority carriers and a depletion width in excess of the equilibrium value. --- ## Chapter 16 Problems The book's Problem Information Table lists, for each problem, the completion point, difficulty level, suggested weighting and a short description. The entries for the first problems are: | Problem | Complete after | Difficulty | Weighting | Short description | |---|---|---|---|---| | 16.1 | 16.3.1 | 2 | 10 (one each diagram) | $\phi_F,\phi_s$ sets / infer diagrams | | 16.2 | 16.3.1 | 2 | 8 (a-2, b-3, c-3) | Examine Fig. 16.8(c) | | 16.3 | 16.3.1 | 2 | 8 | GaAs $W_T$ vs. doping plot |