part13_2

V_G=\phi_s+\frac{K_s}{K_o}x_o\left[\frac{2qN_A\phi_s}{K_s\varepsilon_0}\right]^{1/2}\qquad(0\le\phi_s\le2\phi_F) \tag{16.28}

Footnote from the book: strictly, the $\delta$-function layers of carriers at the O–S interface in the delta-depletion model would contribute a $Q_{O\text{-}S}$ under accumulation and inversion. However, in that model ${\varphi }_s=0$ for all accumulation biases and ${\varphi }_s=2{\varphi }_F$ for all inversion biases, so the $V_G$–${\varphi }_s$ relationship above is only used for depletion-bias calculations.

Handy fact: since $K_s=11.8$ for Si and $K_o=3.9$ for SiO${}_2$, Eq. (16.24) says ${\mathcal{E}}_{ox}\approx 3{\mathcal{E}}_s$ in an MOS system with no charge at the Si–SiO${}_2$ interface. All energy band diagrams in this chapter should be consistent with this (the oxide band edges are about three times as steep as the semiconductor bands at the interface).

Reading Fig. 16.10 (the $V_G$ vs. ${\varphi }_s$ curve for $x_o=0.1\mu$m, $N_A=10^{15}{\text{cm}}^{-3}$, $T=300$ K; delta-depletion vs. exact):

• ${\varphi }_s$ varies quite rapidly with $V_G$ in depletion: the gate voltage is shared proportionally between oxide and semiconductor.
• In accumulation (${\varphi }_s<0$) and inversion (${\varphi }_s>2{\varphi }_F$) it takes a large change in $V_G$ to produce a small change in ${\varphi }_s$. Changes in the applied potential are then dropped almost entirely across the oxide.
• The depletion-bias region is only slightly more than 1 V wide. Since the semiconductor’s character changes drastically from one side of this region to the other, we expect a significant variation in electrical characteristics over a rather narrow voltage range.

Intuition: think of ${\varphi }_s$ as the water level in a tank that is easy to move while the tank has a floor that is “soft” (depletion) but becomes a rigid wall in accumulation (a layer of majority carriers that answers any push instantly) and in inversion (a layer of minority carriers that answers any push instantly). In those two regimes the semiconductor is a nearly ideal metal-like plate and the oxide takes the voltage.

Exercise 16.3

Problem. An MOS-C at $T=300$ K has $x_o=0.1\mu$m and Si doping $N_A=10^{15}{\text{cm}}^{-3}$. Compute (a) ${\varphi }_F$ in $kT/q$ units and in volts, (b) $W$ when ${\varphi }_s={\varphi }_F$, (c) ${\mathcal{E}}_s$ when ${\varphi }_s={\varphi }_F$, (d) $V_G$ when ${\varphi }_s={\varphi }_F$.

Constants: $kT/q=0.0259$ V, $n_i=10^{10}{\text{cm}}^{-3}$, $K_s=11.8$, $K_o=3.9$, ${\epsilon }_0=8.85\times 10^{-14}$ F/cm, $q=1.6\times 10^{-19}$ C, $x_o=0.1\mu \text{m}=10^{-5}$ cm.

(a) p-type, so use (16.8a):

\frac{\phi_F}{kT/q}&=\ln\frac{N_A}{n_i}=\ln\frac{10^{15}}{10^{10}}=\ln 10^{5}=11.51\\ \phi_F&=11.51\,(0.0259\ \text{V})=0.298\ \text{V} \end{aligned}$$ $$\boxed{\phi_F=11.51\,kT/q=0.298\ \text{V}}$$ **(b)** Use (16.15) with $\phi_s=\phi_F=0.298$ V: $$\begin{aligned} W&=\left[\frac{2K_s\varepsilon_0\phi_s}{qN_A}\right]^{1/2} =\left[\frac{2(11.8)(8.85\times10^{-14})(0.298)}{(1.6\times10^{-19})(10^{15})}\right]^{1/2}\\ &=\left[\frac{6.224\times10^{-13}}{1.6\times10^{-4}}\right]^{1/2} =\left[3.89\times10^{-9}\ \text{cm}^2\right]^{1/2}\\ &=6.24\times10^{-5}\ \text{cm} \end{aligned}$$ $$\boxed{W=0.624\ \mu\text{m}}$$ **(c)** Evaluate (16.12) at $x=0$: $$\begin{aligned} \mathcal{E}_s&=\frac{qN_A}{K_s\varepsilon_0}W=\frac{(1.6\times10^{-19})(10^{15})(6.24\times10^{-5})}{(11.8)(8.85\times10^{-14})}\\ &=\frac{9.98\times10^{-9}}{1.044\times10^{-12}}\ \text{V/cm} \end{aligned}$$ $$\boxed{\mathcal{E}_s\approx9.56\times10^{3}\ \text{V/cm}}$$ **(d)** Use (16.26): $$\begin{aligned} V_G&=\phi_s+\frac{K_s}{K_o}\,\mathcal{E}_s\,x_o\\ &=0.298+\frac{11.8}{3.9}\,(9.56\times10^{3})(10^{-5})\\ &=0.298+(3.026)(0.0956)\\ &=0.298+0.289 \end{aligned}$$ $$\boxed{V_G\approx0.587\ \text{V}}$$ Check via (16.28): $\mathcal{E}_s=\sqrt{2qN_A\phi_s/(K_s\varepsilon_0)}=\sqrt{2(1.6\times10^{-4})(0.298)/(1.044\times10^{-12})}=9.56\times10^3$ V/cm. Same. **Comment.** These results are representative. In $kT/q$ units $|\phi_F|$ typically lies between 9 and 18 at 300 K, and for nondegenerate dopings $|\phi_F|$ is less than half the Si band gap in volts ($<0.56$ V). The computed $W$ is less than $W_T$ for this doping, as it must be (Fig. 16.9); indeed $W_T=\sqrt{2}\,W=0.88\ \mu$m here. The only possible surprise is the size of the surface field, $\sim10^4$ V/cm. The device parameters are identical to those of Fig. 16.10, and the computed $V_G$ agrees with the value read from that plot. --- ## 16.4 Capacitance–Voltage Characteristics Since the oxide blocks d.c. current, the main observable of an MOS-C is **capacitance**. It varies with gate voltage, and the measured $C$–$V$ characteristic is of great practical importance: to the device specialist it is a picture window into the internal nature of the structure. It is a powerful diagnostic tool for finding deviations from the ideal in both the oxide and the semiconductor, and therefore is routinely monitored during MOS fabrication. **Measurement.** Typical laboratories use automated equipment like that of Subsection 7.2.3 / Fig. 7.6. The MOS-C sits on a probing station, usually in a light-tight box (to exclude room light), connected by shielded cables to a $C$–$V$ meter. The meter superimposes a small a.c. signal (typically $\lesssim15$ mV rms, commonly at 1 MHz) on a preselected d.c. voltage and detects the resulting a.c. current. The d.c. voltage is swept slowly to obtain a continuous or quasi-continuous $C$–$V$ curve, displayed on a monitor and printed. More sophisticated equipment (Fig. 16.11a) combines a high-frequency (1 MHz) $C$–$V$ meter with low-frequency (quasistatic) capability. This section models the $C$–$V$ characteristic in the **low-frequency** and **high-frequency** limits. (These names originally referred to the a.c. signal frequency used in the measurement.) The theory is restricted to the ideal structure; practical measurement considerations come at the end of the section. ### 16.4.1 Theory and Analysis #### Qualitative Theory Fig. 16.11(b) shows representative high- and low-frequency data for a device on $N_D=9.1\times10^{14}\ \text{cm}^{-3}$ (100) Si with $x_o=0.119\ \mu$m. Capacitance (normalized to $C_o$, vertical axis 0 to 1.0) is plotted against $V_G$ from about $-5$ V to $+2$ V: it is flat near $1$ at positive $V_G$ (accumulation), falls through depletion at about $-1$ to $-3$ V, and then, at large negative $V_G$, the low-frequency curve climbs back up toward 1 while the high-frequency curve stays at its minimum. To explain this, follow an **n-type** MOS-C from accumulation through depletion to inversion, and ask how the charge responds to the small a.c. signal. **Accumulation.** The d.c. state is a pile-up of majority carriers right at the O–S interface. The system can change very rapidly: majority carriers equilibrate with time constants of order $10^{-10}$ to $10^{-13}$ s. Thus at probing frequencies $\le1$ MHz the device follows the a.c. signal quasistatically: the a.c. signal adds or subtracts a small $\Delta Q$ on the two sides of the oxide (Fig. 16.12a). This is exactly a parallel-plate capacitor, for low *or* high probing frequency: $$C(\text{acc})=C_o=\frac{K_o\varepsilon_0A_G}{x_o} \tag{16.29}$$ where $A_G$ is the gate area. **Depletion.** For n-type, the d.c. state is $-Q$ on the gate and $+Q$ of depletion-layer charge in the semiconductor (majority carriers withdrawn from a width $W$ next to the interface). Again only majority carriers participate, so the charge changes very rapidly. When the a.c. signal puts more negative charge on the gate, the depletion layer widens almost instantaneously (Fig. 16.12b): $W$ quasistatically fluctuates about its d.c. value. Remove the stationary d.c. charge conceptually and what remains is a small fluctuating charge on the two sides of a *double-layer insulator*. For all probing frequencies this is two parallel-plate capacitors in **series**: $$C_o=\frac{K_o\varepsilon_0A_G}{x_o}\quad\text{(oxide capacitance)} \tag{16.30a}$$ $$C_s=\frac{K_s\varepsilon_0A_G}{W}\quad\text{(semiconductor capacitance)} \tag{16.30b}$$ $$C(\text{depl})=\frac{C_oC_s}{C_o+C_s}=\frac{C_o}{1+\dfrac{K_oW}{K_sx_o}} \tag{16.31}$$ Because $W$ grows with depletion bias, $C(\text{depl})$ *decreases* as the d.c. bias moves from flat band to the onset of inversion. > **Intuition:** Picture the capacitor as two pillows stacked. The oxide pillow has fixed thickness. The semiconductor pillow is *inflatable*: the more you deplete, the thicker it is, and the harder it is for the plates to "feel" each other, so total capacitance falls. **Inversion.** Now minority carriers pile up near the interface and the d.c. depletion width is maximum, $W_T$. How does the a.c. charge respond? Two extreme options: the inversion charge fluctuates (Fig. 16.12c), or the depletion edge fluctuates (Fig. 16.12d); a combination is also conceivable. It turns out the answer depends on frequency. - **Very low frequency ($\omega\to0$):** minority carriers can be generated or annihilated in response to the a.c. signal; the a.c. state is a succession of d.c. states. As in accumulation, charge is added/removed near the edges of a single-layer insulator (Fig. 16.12c): $$C(\text{inv})\approx C_o\quad\text{for }\omega\to0 \tag{16.32}$$ - **Very high frequency ($\omega\to\infty$):** the sluggish generation–recombination process cannot supply or remove minority carriers in step with the a.c. signal. The inversion layer charge remains fixed at its d.c. value and only the depletion edge wiggles about $W_T$ (Fig. 16.12d), just like depletion biasing: two capacitors in series with $W=W_T$ constant: $$C(\text{inv})=\frac{C_oC_s}{C_o+C_s}=\frac{C_o}{1+\dfrac{K_oW_T}{K_sx_o}}\quad\text{for }\omega\to\infty \tag{16.33}$$ Because $W_T$ is independent of the d.c. inversion bias, the high-frequency inversion capacitance is a constant, the minimum: $C(\text{depl})_{min}$. At intermediate frequencies, where only part of the inversion charge can follow the signal, an intermediate inversion capacitance between the two limits is observed. > **Intuition (the slow mailman):** minority carriers in inversion are created by thermal generation, a slow process compared to a 1 MHz signal. A high-frequency signal is like shouting to a person who needs a second to respond: the "inversion layer" can't respond, so the only thing that moves is the depletion edge. A very slow signal gives thermal generation time to keep up, so the electrons obey and the capacitor looks like the oxide alone. **Overall theory.** For an n-type device the accumulating gate voltages ($C\approx C_o$) are positive, the inverting gate voltages are negative, and the decreasing-capacitance depletion region is of the order of a volt wide. $C\approx C_o$ under accumulation, decreases through depletion, and is again approximately constant under inversion: $\approx C_o$ if $\omega\to0$ or $C(\text{depl})_{min}$ if $\omega\to\infty$. This is in good agreement with the experimental curves of Fig. 16.11(b). ### Exercise 16.4 **Problem.** Complete the table using the ideal-structure $C$–$V$ characteristic (points a–g) and the block charge diagrams (1–5) of Figure E16.4. For each biasing condition give the letter(s) of the bias point(s) on the $C$–$V$ curve and the number of the block charge diagram. The figure shows an n-bulk $C$–$V$ curve vs. $V_G$: a flat high-$C$ plateau at positive $V_G$ (point g), a falling depletion portion (points f at flat band, e in mid-depletion, d at the depletion/inversion transition), and the inverted region on the left (points c, b, a; the high-frequency curve stays at minimum, the low-frequency curve rises to $C_o$). Charge diagrams: (1) $-Q$ on M, wide ionized-donor block in S (depletion); (2) no charge (flat band); (3) $+Q$ on M, thin electron sheet in S (accumulation); (4) $-Q$ on M, hole sheet plus ionized-donor block (inversion); (5) $-Q$ on M, wide ionized-donor block with the holes just appearing (transition). **Solution.** Reason from the polarity (n-type: positive $V_G$ = accumulation) and from what happens to $C$: - **Accumulation:** large positive $V_G$, $C=C_o$, electrons at the interface: point **g**, diagram **3**. - **Flat band:** $V_G=0$, boundary between accumulation and depletion, no charge: point **f**, diagram **2**. - **Depletion:** negative $V_G$ of modest size, $C$ falling, depletion block: point **e**, diagram **1**. - **Depletion/inversion transition:** maximum depletion width just reached: point **d**, diagram **5**. - **Inversion:** $V_G$ more negative than $V_T$, $W=W_T$, hole layer present: points **a/b/c** (a, b, c, depending on frequency: $C_{min}$ at high frequency, rising toward $C_o$ at low frequency), diagram **4**. | Bias condition | Capacitance point | Charge diagram | |---|---|---| | Accumulation | g | 3 | | Depletion | e | 1 | | Inversion | a / b / c | 4 | | Flat band | f | 2 | | Depl/inv transition | d | 5 | This matches the book's answer key. --- #### Delta-Depletion Analysis Building on the previous subsection, a first-order quantitative theory follows from the delta-depletion formulation: the charge blocks representing accumulation and inversion layers in Fig. 16.12 are formally replaced by $\delta$-functions at the O–S interface. Then $C$ equals $C_o$ *exactly* for accumulation biases, and for inversion biases in the low-frequency limit. The depletion relationship (16.31) and the high-frequency inversion relationship (16.33) are used unmodified (the block modelling in Fig. 16.12 matches the depletion approximation exactly). Thus: $$C=C_o\quad\text{accumulation} \tag{16.34a}$$ $$C=\frac{C_o}{1+\dfrac{K_oW}{K_sx_o}}\quad\text{depletion} \tag{16.34b}$$ $$C=C_o\quad\text{inversion }(\omega\to0) \tag{16.34c}$$ $$C=\frac{C_o}{1+\dfrac{K_oW_T}{K_sx_o}}\quad\text{inversion }(\omega\to\infty) \tag{16.34d}$$ Given device parameters, $C_o$ and $W_T$ follow from earlier relationships. To complete the analytical solution, the depletion-bias $W$ in (16.34b) must be expressed as a function of $V_G$. Inverting (16.28) to get $\sqrt{\phi_s}$ as a function of $V_G$ and substituting into (16.15) gives $$W=\frac{K_s}{K_o}x_o\left[-1+\sqrt{1+\frac{V_G}{V_\delta}}\,\right] \tag{16.35}$$ where $$V_\delta\equiv\frac{qN_A\,K_s\,x_o^2}{2K_o^2\varepsilon_0}\quad\text{(p-bulk device; for n-bulk }N_A\to-N_D) \tag{16.36}$$ (The derivation: (16.28) is quadratic in $\sqrt{\phi_s}$, $V_G=\phi_s+2\sqrt{V_\delta\phi_s}$, whose positive root is $\sqrt{\phi_s}=\sqrt{V_\delta}\big(-1+\sqrt{1+V_G/V_\delta}\big)$; then $W=\frac{K_s}{K_o}x_o\sqrt{\phi_s/V_\delta}$.) Note that if (16.35) is substituted into (16.34b) one obtains a very simple result: