Chapter 12 — BJT Dynamic Response Modeling
The big picture. A transistor is used in two main ways: as a small-signal amplifier (tiny wiggles riding on a DC bias) and as a switch (slammed between “off” and “on”). Imagine a water tap. In amplifier mode you nudge the handle a hair and watch the flow respond proportionally. In switch mode you yank it fully open or fully shut. This chapter builds one model for each situation: the small-signal equivalent circuit (Section 12.1) and the transient (switching) response (Section 12.2). Because modern amplifiers want high gain and wide bandwidth, almost everything is done in the common-emitter (CE) configuration, so we emphasize that.
12.1 Small-Signal Equivalent Circuits
12.1.1 Generalized Two-Port Model
Setup. Treat the BJT in CE configuration as a “black box” with two ports (input: base–emitter, output: collector–emitter). In this chapter all currents are positive when flowing into a terminal and all voltages are measured relative to the common (emitter) terminal.
DC quantities: . AC (small-signal) quantities: . Total instantaneous values are DC plus AC:
Key fact from Chapter 11. The DC currents are functions of the applied DC voltages only:
The critical assumption: quasistatic operation. In words: the transistor internals (charge distributions) adjust instantly to the slowly changing terminal voltages, so at every instant the currents are the same functions as in DC, just evaluated at the instantaneous voltages. Think of a heavy sled pulled slowly: it is always essentially in equilibrium with the pull. Then
i_B = I_B(V_{BE}+v_{be},\,V_{CE}+v_{ce}) = I_B(V_{BE},V_{CE}) + i_b \tag{12.1a} i_C = I_C(V_{BE}+v_{be},\,V_{CE}+v_{ce}) = I_C(V_{BE},V_{CE}) + i_c \tag{12.1b}
Subtract the DC part:
i_b = I_B(V_{BE}+v_{be},V_{CE}+v_{ce}) - I_B(V_{BE},V_{CE}) \tag{12.2a} i_c = I_C(V_{BE}+v_{be},V_{CE}+v_{ce}) - I_C(V_{BE},V_{CE}) \tag{12.2b}
Taylor expansion about the DC operating point (keep only first-order terms; products like and are negligible when the signal is small):
I_B(V_{BE}+v_{be},V_{CE}+v_{ce}) \approx I_B(V_{BE},V_{CE}) + \left.\frac{\partial I_B}{\partial V_{BE}}\right|_{V_{CE}} v_{be} + \left.\frac{\partial I_B}{\partial V_{CE}}\right|_{V_{BE}} v_{ce} \tag{12.3a} I_C(V_{BE}+v_{be},V_{CE}+v_{ce}) \approx I_C(V_{BE},V_{CE}) + \left.\frac{\partial I_C}{\partial V_{BE}}\right|_{V_{CE}} v_{be} + \left.\frac{\partial I_C}{\partial V_{CE}}\right|_{V_{BE}} v_{ce} \tag{12.3b}
Substituting into (12.2):
i_b = \left.\frac{\partial I_B}{\partial V_{BE}}\right|_{V_{CE}} v_{be} + \left.\frac{\partial I_B}{\partial V_{CE}}\right|_{V_{BE}} v_{ce} \tag{12.4a} i_c = \left.\frac{\partial I_C}{\partial V_{BE}}\right|_{V_{CE}} v_{be} + \left.\frac{\partial I_C}{\partial V_{CE}}\right|_{V_{BE}} v_{ce} \tag{12.4b}
Each partial derivative has units of current/voltage, i.e. conductance. Name them (the -parameters):
\text{npn: }\ g_{11}=\left.\frac{\partial I_B}{\partial V_{BE}}\right|_{V_{CE}},\quad g_{12}=\left.\frac{\partial I_B}{\partial V_{CE}}\right|_{V_{BE}},\quad g_{21}=\left.\frac{\partial I_C}{\partial V_{BE}}\right|_{V_{CE}},\quad g_{22}=\left.\frac{\partial I_C}{\partial V_{CE}}\right|_{V_{BE}}\tag{12.5a,c}
\text{pnp: }\ g_{11}=\left.\frac{\partial I_B}{\partial V_{EB}}\right|_{V_{EC}},\quad g_{12}=\left.\frac{\partial I_B}{\partial V_{EC}}\right|_{V_{EB}},\quad g_{21}=\left.\frac{\partial I_C}{\partial V_{EB}}\right|_{V_{EC}},\quad g_{22}=\left.\frac{\partial I_C}{\partial V_{EC}}\right|_{V_{EB}}\tag{12.5b,d}
(Why two sets? A pnp has voltages and currents reversed relative to an npn. In the pnp set, is the current out of the base and the current into the collector, in active mode. With these conventions the derivatives have the same signs as the npn ones.)
Then the small-signal equations are
i_b = g_{11}v_{be}+g_{12}v_{ce} \tag{12.6a} i_c = g_{21}v_{be}+g_{22}v_{ce} \tag{12.6b}
Reading them as a circuit. (12.6a) and (12.6b) are KCL at the base and collector nodes. is the current through a conductance across the input; is the current through across the output. (at the input) and (at the output) are controlled by the voltage at the other port, so they are voltage-controlled current sources. This gives Fig. 12.1(b): from B to E in parallel with a source ; at the output from C to E in parallel with a source .
Comments.
- Valid only at low frequencies (capacitive/charge-storage effects neglected: quasistatic).
- The derivation is purely mathematical; it works for any three-terminal device in any configuration by relabeling the terminals. Only the -definitions tie it to a specific device/configuration.
- Explicit formulas for the ‘s follow from the Chapter 11 DC current relations, but the Hybrid-Pi arrangement is preferred in practice.
12.1.2 Hybrid-Pi Models
The Hybrid-Pi model is the workhorse. Its parameters link directly to the DC operating point and their temperature dependence is easy to deduce. Fig. 12.2:
- (a) Simplified: from B to E, current source from C to E.
- (b) Complete low-frequency: add (B to C) and (C to E).
- (c) High-frequency: add the capacitances (across the intrinsic B′–E′) and (B′–C′), plus parasitic series resistances connecting the intrinsic transistor (primed nodes) to the external terminals.
The name comes from the -shaped arrangement of elements and the “hybrid” mixture of conductance and resistance units. Parameters: transconductance (forward gain), output resistance, input resistance, feedthrough (feedback) resistance.
Deriving the simplified model. In active mode the Ebers–Moll equations (11.47) for a pnp reduce to
I_E \approx I_{F0}\,e^{qV_{EB}/kT}\quad(V_{EB}>0,\ V_{CB}<0) \tag{12.7a} I_C \approx \alpha_F I_{F0}\,e^{qV_{EB}/kT} \tag{12.7b} I_B = I_E - I_C = (1-\alpha_F)I_{F0}\,e^{qV_{EB}/kT} \tag{12.7c}
If base-width modulation is negligible, and are constants independent of , so
g_{12}=\left.\frac{\partial I_B}{\partial V_{EC}}\right|_{V_{EB}}=0,\qquad g_{22}=\left.\frac{\partial I_C}{\partial V_{EC}}\right|_{V_{EB}}=0 \tag{12.8a,b}
With the two-port model collapses to Fig. 12.2(a), with and . Evaluating:
g_m=\left.\frac{\partial I_C}{\partial V_{EB}}\right|_{V_{EC}}=\frac{qI_C}{kT}\tag{12.9a} \frac{1}{r_\pi}=\left.\frac{\partial I_B}{\partial V_{EB}}\right|_{V_{EC}}=\frac{qI_B}{kT}=\frac{g_m}{\beta_{dc}}\ \Rightarrow\ r_\pi=\frac{\beta_{dc}}{g_m}\tag{12.9b}
(Differentiating multiplies by , so .) Intuition: depends only on collector current and temperature. At room temperature mV, so mS per mA of collector current: a universal rule of thumb.
Complete four-element model (Fig. 12.2b) is used when base-width modulation matters. Relation to the two-port parameters (derived in Problem 12.4):
g_m = g_{21}-g_{12},\quad r_o = \frac{1}{g_{22}+g_{12}},\quad r_\pi=\frac{1}{g_{11}+g_{12}},\quad r_\mu=-\frac{1}{g_{12}} \tag{12.10a-d}
is typically orders of magnitude smaller than the other conductances, so it can be neglected in , , , and (12.9) remains good.
High-frequency model (Fig. 12.2c). models the reverse-biased C–B junction (essentially pure junction capacitance); models the forward-biased E–B junction (junction plus diffusion capacitance). The Chapter 7 junction-capacitance formulas apply unchanged, but the diffusion part must be modified for the narrow base (Problem 12.7). Additional capacitances (C′–B or C′–substrate) may be needed in ICs. The model is valid up to roughly 500 MHz; above that it ignores signal-propagation delays across the device regions.
12.2 Transient (Switching) Response
The BJT is used as a switch from discrete circuits to IC logic. Compared with a pn diode it switches faster and has a third lead that helps control the process. Like the diode, the delay comes from building up or removing excess minority-carrier charge. Analogy: filling or emptying a bathtub with a leaky drain (recombination). You cannot change the water level instantly, and the time it takes is the switching delay.
12.2.1 Qualitative Observations
Circuit (Fig. 12.3a): supply across load and the transistor; input source with series resistor pulses between and .
- : cutoff, , operating point at the bottom of the load line (“off”).
- : both junctions forward biased, saturation, (“on”).
Turn-on (pulse from to at ). With , and stays constant. Before the base minority profile is (i) in Fig. 12.4(d). After holes pile up in the base (ii); is proportional to the slope of at , so it tracks the build-up while the BJT is active. Eventually grows until (i.e. ) and the transistor enters saturation. The build-up then completes (iii), with increasing only slightly to its on-value.
Turn-off has two phases. After flips to : (iv) stays roughly constant while the saturation-stored charge is removed (the storage delay, analogous to the diode storage delay); (v) once the BJT is active again, falls in proportion to the remaining stored charge until cutoff. The base current reverses to and stays until cutoff, then decays to zero (same as the diode turn-off).
12.2.2 Charge Control Relationships
The diode charge-control result (Subsection 6.3.1) applies to the quasineutral base (pnp, ). The hole charge stored in the base is
Q_B = qA\int_0^W \Delta p_B(x,t)\,dx \tag{12.12}
Hole continuity integrated over the base gives (injection in at , collection out at , recombination inside):
\frac{dQ_B}{dt} = -A\left[J_p(W)-J_p(0)\right]-\frac{Q_B}{\tau_B}\tag{12.11}
If and (emitter and collector currents dominated by hole diffusion currents across the E–B and C–B junctions),
A\left[J_p(0)-J_p(W)\right]=i_E-i_C=i_B \tag{12.13}
and the charge-control equation is
\boxed{\frac{dQ_B}{dt}=i_B-\frac{Q_B}{\tau_B}} \tag{12.14}
Steady state: . Interpretation: there are excess carriers, each living on average , so all of them recombine every seconds; a base current must replenish them. (Valid if base recombination dominates ; emitter back-injection is neglected.)
Collector current. From diffusion at :
i_C = AJ_p(W)=-qAD_B\left.\frac{\partial \Delta p_B}{\partial x}\right|_{x=W} \tag{12.15}
Assuming keeps the steady-state shape (linear for ):
\Delta p_B(x,t)=\Delta p_B(0,t)+\left[\Delta p_B(W,t)-\Delta p_B(0,t)\right]\frac{x}{W} \tag{12.16}
In active mode :
\Delta p_B(x,t)=\Delta p_B(0,t)\left(1-\frac{x}{W}\right) \tag{12.17} \left.\frac{\partial\Delta p_B}{\partial x}\right|_{x=W}=-\frac{\Delta p_B(0,t)}{W} \tag{12.18} Q_B = qA\Delta p_B(0,t)\int_0^W\left(1-\frac xW\right)dx = \frac{qAW}{2}\Delta p_B(0,t) \tag{12.19} i_C = \frac{qAD_B}{W}\Delta p_B(0,t)=\frac{qAD_B}{W}\cdot\frac{2Q_B}{qAW}=\frac{Q_B}{W^2/2D_B} \tag{12.20}
\boxed{i_C=\frac{Q_B}{\tau_t}\ \ (\text{active mode}),\qquad \tau_t=\frac{W^2}{2D_B}} \tag{12.21, 12.22}
is the base transit time: the average time for minority carriers to diffuse across the quasineutral base. Picture the stored charge “dropping into the collector” every seconds. Also
(a carrier crosses the base in but lives ; the ratio counts collector carriers per recombined carrier).
12.2.3 Quantitative Analysis
Turn-on. constant:
\frac{dQ_B}{dt}=I_{BB}-\frac{Q_B}{\tau_B}\tag{12.23}
General solution (particular solution plus homogeneous):
Q_B(t)=I_{BB}\tau_B+Ae^{-t/\tau_B}\tag{12.24}
Initial condition (cutoff): :
Q_B(t)=I_{BB}\tau_B\left(1-e^{-t/\tau_B}\right),\quad t\ge0\tag{12.25}
i_C(t)=\begin{cases}\dfrac{Q_B(t)}{\tau_t}=\dfrac{I_{BB}\tau_B}{\tau_t}\left(1-e^{-t/\tau_B}\right), & 0\le t\le t_r\\[2mm] \dfrac{V_{CC}}{R_L}=I_{CC}, & t\ge t_r\end{cases}\tag{12.26a,b}
The rise time is the time the BJT spends in active mode. Set :
\boxed{t_r=\tau_B\ln\!\left[\frac{1}{1-\dfrac{I_{CC}\tau_t}{I_{BB}\tau_B}}\right]}\tag{12.27}
Intuition: larger (fill faster) or smaller (less charge needed) shortens . Substituting back, the charge at the active/saturation boundary is (needed for turn-off). While saturated, stays at but keeps rising toward (Fig. 12.5); the surplus is the saturation-stored charge.
Turn-off. Let with (input just opened, ) or (input reversed to , ). Reset at the start of turn-off:
\frac{dQ_B}{dt}=-\xi I_{BB}-\frac{Q_B}{\tau_B}\tag{12.28} Q_B(t)=-\xi I_{BB}\tau_B+Ae^{-t/\tau_B}\tag{12.29}
At the stored charge equals the end of turn-on, :
Q_B(t)=I_{BB}\tau_B\left[(1+\xi)e^{-t/\tau_B}-\xi\right]\tag{12.30}
i_C(t)=\begin{cases}I_{CC},&0\le t\le t_{sd}\ \text{(saturation)}\\[1mm]\dfrac{Q_B(t)}{\tau_t}=\dfrac{I_{BB}\tau_B}{\tau_t}\left[(1+\xi)e^{-t/\tau_B}-\xi\right],&t\ge t_{sd}\ \text{(active)}\end{cases}\tag{12.31a,b}
The storage delay time is the time spent saturated. At its end :
\boxed{t_{sd}=\tau_B\ln\!\left[\frac{1+\xi}{\xi+\dfrac{I_{CC}\tau_t}{I_{BB}\tau_B}}\right]}\tag{12.32}
Since , decreases when : a reverse base current helps drain the tub. also drops with smaller , smaller (less stored charge) and larger (less overdrive). Note , the inverse of the overdrive factor.
12.2.4 Practical Considerations
The real transient (Fig. 12.6) is rounded near transition points and has an extra delay time at the start, from charging the E–B junction capacitance from cutoff into the active mode. Datasheets define (10% to 90% of ), (input edge to falling to 90% of ) and (90% to 10%).
Speed-up methods:
- Turn-on: a capacitor in parallel with ; its discharge after gives a momentary base-current spike that builds charge faster.
- Turn-off: add recombination–generation centers (e.g., gold in Si) to reduce ; or use a Schottky-diode clamp (Fig. 12.7): a Schottky diode between collector and base conducts at a much lower forward voltage than the C–B pn junction, so when the BJT starts to saturate the diode carries the excess base current and clamps at a small positive value, greatly limiting saturation charge. A Schottky diode stores almost no minority charge, so turn-off is dramatically faster.
12.3 Summary
- A low-frequency small-signal two-port model with four conductances follows from the quasistatic assumption and a first-order Taylor expansion; it applies to essentially any three-terminal device.
- The Hybrid-Pi model (simplified, complete, high-frequency) relates to the two-port parameters via (12.10); , .
- Switching means adding/removing stored minority charge. Charge control: , (active), , .
- Turn-on: ; turn-off: , with .
- Speed-ups: input capacitor, recombination centers, Schottky clamp.
Chapter 12 Problems (with full solutions)
| Problem | Section | Level | Points | Description |
|---|---|---|---|---|
| 12.1 | 12.3 | 1 | 10 | Quick quiz |
| 12.2 | 12.1.1 | 2-3 | 8 | Derive common-base circuit |
| 12.3 | 12.1.2 | 1 | 5 | Determine , |
| 12.4 | 12.1.2 | 3 | 8 | Confirm Eqs. (12.10) |
| 12.5 | 12.1.2 | 4 | 20 | Calculate Hybrid-Pi parameters (computer) |
| 12.6 | 12.1.2 | 4 | 20 | Derive/compute |
| 12.7 | 12.2.2 | 3-4 | 10 | E–B diffusion capacitance |
| 12.8 | 12.2.3 | 2 | 5 | Estimate |
| 12.9 | 12.2.3 | 2 | 8 | and plots |
| 12.10 | 12.2.4 | 3 | 10 | derivation and plot |
Problem 12.1 — Quick Quiz
(a) Quasistatic assumption. The device’s internal charge distributions respond instantly to changing terminal voltages, so instantaneous currents equal the DC functions evaluated at the instantaneous voltages. It is used to write (and likewise for ), i.e. to replace the true dynamic currents by static functions, which can then be Taylor-expanded.
(b) Separate npn/pnp definitions. The pnp has all voltage polarities and current directions reversed. The are written with the variables (, , out of the base, into the collector) natural for a pnp in active mode, so that the conductances carry the same signs as in the npn case.
(c) Origin of “Hybrid-Pi”. The circuit elements are arranged like the Greek letter , and the parameters mix conductance and resistance units (“hybrid”).
(d) Names. : transconductance; : output resistance; : input resistance; : feedthrough (feedback) resistance.
(e) Capacitors. The junctions store charge that varies with voltage: depletion (junction) charge and, for forward-biased junctions, minority-carrier diffusion charge. At high frequency this charge cannot follow instantly; it appears as capacitance in parallel with the junction conductances ( across E–B, across C–B).
(f) Saturation during turn-on. remains constant (). The C–B junction becomes forward biased (), so no longer follows the stored charge and stays essentially at (rising only slightly). The stored base charge keeps increasing toward ; the minority profile lifts at (plot iii in Fig. 12.4d).
(g) Base transit time. Words: the average time a minority carrier needs to diffuse across the quasineutral base. Math: .
(h) Relation to . .
(i) Effect of reverse . In , a negative removes charge faster than recombination alone, so saturation charge drains sooner (shorter ) and the active-mode charge falls faster (shorter ). A positive would do the opposite.
(j) Schottky-diode clamp. A Schottky diode connected from collector to base (Fig. 12.7). It conducts at a lower forward voltage than the C–B pn junction, so it clamps at a small value and prevents deep saturation. With little stored charge in the transistor and negligible minority storage in the Schottky diode, turn-off becomes much faster.
Problem 12.2 — Common-base small-signal circuit
Problem. Establish a small-signal equivalent circuit analogous to Fig. 12.1(b) for the common-base configuration; summarize the parameter definitions like Eqs. (12.5).
Solution. In CB, the input port is E–B and the output port is C–B; the common terminal is the base. Currents flow into terminals; voltages are terminal-to-base. DC currents depend only on the DC voltages: , .
Quasistatic total currents:
First-order Taylor expansion (as in 12.3), then subtract the DC parts:
Definitions (npn):
For the pnp, the same definitions apply with all voltages and currents reversed in polarity (voltages , ; currents , taken out of the terminals), which leaves the conductances unchanged.
Equations:
Circuit: between E and B a conductance in parallel with a current source ; between C and B a conductance in parallel with a current source . This is the topology of Fig. 12.1(b) with (B, C, E) relabeled (E, C, B).
Active-mode check (no base-width modulation), , :
So the CB input resistance is and the current gain is .
Problem 12.3 — and for the 2N2605
Problem. Using the 2N2605 pnp CE characteristics (Fig. 11.5d), A and V; find and .
Assumption (figure not available). Reading the A curve at V, take mA, i.e. . If your figure reads differently, use the formulas with your value.
(Note depends only on .)
Problem 12.4 — Confirm Eqs. (12.10)
Problem. Show that Fig. 12.2(b) gives , , , .
Solution. KCL at the base node (current splits between to E and to C):
KCL at the collector node (source, , and the current arriving through from B):
Match coefficients with , (valid for arbitrary ):
Since (a larger collector voltage narrows the base and reduces base current), as required.
Problem 12.5 — Computer exercise: Hybrid-Pi parameters
Problem. Write a MATLAB program that computes with and without base-width modulation for given , ; run with V and chosen so mA; also compute , from (12.9); discuss.
Assumption. The BJT0/BJTplus listings (Appendix M) are not in the supplied text, so the program below is self-contained with a stated pnp model (replace the parameter block with the BJT0 values if desired). Model: narrow-base diffusion current ; ; base recombination plus emitter back-injection; , with the C–B depletion extension into the base.
Logic.
- Define and as functions; the flag
bwmselects base-width modulation (1) or fixed (0). - Find giving mA by bisection ( is monotonic in ).
- Compute by central finite differences (the definition (12.5)).
- Apply (12.10): , , , .
- Compare with and (12.9).
% hybrid_pi.m -- Hybrid-Pi parameters of a pnp BJT (self-contained)
clear; clc;
q=1.602e-19; k=1.381e-23; T=300; Vt=k*T/q; es=11.7*8.854e-14;
ni=1e10; NE=1e18; NB=1e16; NC=1e15; % assumed doping (cm^-3)
DB=12; DE=3; tauB=1e-7; tauE=1e-8; % cm^2/s, s
LB=sqrt(DB*tauB); LE=sqrt(DE*tauE);
A=1e-4; WB0=1.5e-4; % cm^2, cm
Vbi=Vt*log(NB*NC/ni^2);
VEC=10; ICtarget=1e-3; d=1e-4; % V, A, V (finite-difference step)
for bwm=[0 1]
% W as function of (VEB,VEC); VBC = VEC-VEB is the C-B reverse bias
W=@(VEB,VEC) WB0 - bwm*sqrt(2*es*(Vbi+VEC-VEB)/q*NC/(NB*(NB+NC)));
Ip=@(VEB,VEC) q*A*DB*ni^2./(NB*W(VEB,VEC)).*exp(VEB/Vt);
IEn=@(VEB) q*A*DE*ni^2/(NE*LE)*exp(VEB/Vt);
IC=@(VEB,VEC) Ip(VEB,VEC).*(1-W(VEB,VEC).^2/(2*LB^2));
IB=@(VEB,VEC) Ip(VEB,VEC).*W(VEB,VEC).^2/(2*LB^2)+IEn(VEB);
lo=0.4; hi=0.8; % bisection for IC = 1 mA
for n=1:60
m=(lo+hi)/2;
if IC(m,VEC)>ICtarget, hi=m; else lo=m; end
end
VEB=m;
g11=(IB(VEB+d,VEC)-IB(VEB-d,VEC))/(2*d);
g12=(IB(VEB,VEC+d)-IB(VEB,VEC-d))/(2*d);
g21=(IC(VEB+d,VEC)-IC(VEB-d,VEC))/(2*d);
g22=(IC(VEB,VEC+d)-IC(VEB,VEC-d))/(2*d);
gm=g21-g12; rpi=1/(g11+g12);
ro=1/(g22+g12); rmu=-1/g12; % Inf if g12=g22=0 (no BWM)
gm_a=q*IC(VEB,VEC)/(k*T); % Eq. (12.9a)
rpi_a=(IC(VEB,VEC)/IB(VEB,VEC))/gm_a; % Eq. (12.9b)
fprintf('BWM=%d: VEB=%.4f V, IB=%.3e A, IC=%.3e A\n',bwm,VEB,IB(VEB,VEC),IC(VEB,VEC));
fprintf(' gm=%.4e S, rpi=%.4e, ro=%.4e, rmu=%.4e\n',gm,rpi,ro,rmu);
fprintf(' Eq(12.9): gm=%.4e S, rpi=%.4e\n\n',gm_a,rpi_a);
endSample results (assumed parameters above; yours will differ with the BJT0 values):
| Case | (V) | (A) | (mS) | |||
|---|---|---|---|---|---|---|
| No BWM | 0.668 | 43.5 | 38.67 | 595 | ||
| With BWM | 0.642 | 7.29 | 38.65 | 3.55 k | 67 k | 12 M |
Eq. (12.9) gives mS in both cases and and k respectively, matching the finite-difference values to within about relative (the tiny correction).
Discussion.
- is essentially identical in all cases and equals : it depends on , not on device details.
- The two cases give different because the fixed wide base () has far more recombination current, hence a smaller at the same .
- Without base-width modulation , so and are infinite, recovering Fig. 12.2(a).
- With modulation, gives a finite (Early voltage V here) and a tiny negative gives a huge , which is why is often dropped.
- Agreement of (12.9) with (12.10) confirms that neglecting is justified.
Problem 12.6 — Unity beta frequency
Problem. (a) With the high-frequency Hybrid-Pi model derive when and from it an expression for (the frequency where ). (b) Evaluate for the 2N3906 at V, V, A, mA, with S, , , , pF, pF, , , .
(a) Derivation. With the collector is a.c. shorted to the emitter. is shorted; is in series with the short; ; is in series with a driving current , so none affects the current ratio. Let be the voltage across the intrinsic B′–E′ port. Because C′ is at a.c. ground, , , , all have across them:
The current into the shorted collector is the source current minus the current that flows back from B′ through and :
Dividing:
Low-frequency limit: . Magnitude:
Set equal to 1 at :
(The approximation neglects and relative to .) Also, for , with : gain falls at 20 dB/decade beyond and reaches unity at .
(b) Numbers.
Check with the approximation: MHz. Also MHz. So MHz, a “general purpose” transistor, as the problem statement suggests.
Problem 12.7 — Diffusion component of
Problem. Show that for an active-mode pnp BJT
Solution. The E–B junction is a narrow-base diode: n-type base of width whose far boundary () holds the excess carrier density at zero (the collector sweeps carriers away). Write and use hole continuity:
Boundary conditions: ; at , , so for small
Solution:
AC current at (hole diffusion):
Admittance with :
Narrow base, , use :
With the imaginary part is . So :
Relation to : the narrow-base dc current is , so
Hence
(For a wide-base diode ; here the transit time replaces the lifetime and the factor becomes .)
Problem 12.8 — Estimate
Problem. In Fig. 12.3(b), mA, A, and was stepped in 5 A increments. Estimate for switching between the “off” and “on” points.
Solution. Use :
with mA and A.
Assumption (curves not available). The “on” point at mA lies near the knee of the A curve, so the base current just needed to reach is A and :
Interpretation: the base is overdriven by a factor , so as required. For a different read from the curves, .
Problem 12.9 — Rise and storage-delay time plots
Problem. Let , . (a) Plot vs using (12.27). (b) Plot vs using (12.32) for and .
Solution. From (12.27) and (12.32):
| () | () | ||
|---|---|---|---|
| 0.05 | 0.051 | 3.00 | 0.646 |
| 0.1 | 0.105 | 2.303 | 0.598 |
| 0.2 | 0.223 | 1.609 | 0.511 |
| 0.3 | 0.357 | 1.204 | 0.431 |
| 0.4 | 0.511 | 0.916 | 0.357 |
| 0.5 | 0.693 | 0.693 | 0.288 |
| 0.6 | 0.916 | 0.511 | 0.223 |
| 0.7 | 1.204 | 0.357 | 0.163 |
| 0.8 | 1.609 | 0.223 | 0.105 |
| 0.9 | 2.303 | 0.105 | 0.051 |
| 0.99 | 4.605 | 0.010 | 0.005 |
| 1.0 | 0 | 0 |
Description. (a) rises slowly from 0 at (large overdrive, fast fill) and diverges logarithmically as : when barely supports the exponential only asymptotically reaches the required charge. (b) , the mirror image. For it diverges as (deep saturation, much stored charge) and vanishes at . For the curve is far lower everywhere (finite, at ): a reverse base current slashes storage delay, especially in deep saturation.
x = linspace(0.001,0.999,500);
tr = -log(1-x);
tsd0 = log(1./x); % xi = 0
tsd1 = log(2./(1+x)); % xi = 1
figure; plot(x,tr,'LineWidth',1.5); grid on
xlabel('x = I_{CC}\tau_t/(I_{BB}\tau_B)'); ylabel('t_r/\tau_B'); ylim([0 5])
figure; plot(x,tsd0,x,tsd1,'LineWidth',1.5); grid on
xlabel('x'); ylabel('t_{sd}/\tau_B'); legend('\xi=0','\xi=1'); ylim([0 3])
Problem 12.10 — Fall time
Problem. (a) Derive using the measurement-based definition (Fig. 12.6: falls from to ) and (12.31b). (b) Plot vs for and discuss.
(a) Derivation. In the active-mode portion, using :
Time at which :
Time at which :
(Both lie after because .) The fall time is the difference:
(b) For : , independent of (pure exponential decay with time constant ). For : .
| () | () | |
|---|---|---|
| 0.1 | 2.197 | 0.076 |
| 0.2 | 2.197 | 0.146 |
| 0.3 | 2.197 | 0.210 |
| 0.4 | 2.197 | 0.268 |
| 0.5 | 2.197 | 0.323 |
| 0.6 | 2.197 | 0.374 |
| 0.7 | 2.197 | 0.421 |
| 0.8 | 2.197 | 0.465 |
| 0.9 | 2.197 | 0.507 |
| 1.0 | 2.197 | 0.547 |
x = linspace(0.001,1,300);
tf0 = log(9)*ones(size(x));
tf1 = log((1+0.9*x)./(1+0.1*x));
plot(x,tf0,x,tf1,'LineWidth',1.5); grid on
xlabel('x = I_{CC}\tau_t/(I_{BB}\tau_B)'); ylabel('t_f/\tau_B'); legend('\xi=0','\xi=1')Discussion. With the active-mode charge leaves only by recombination, so regardless of drive. With a reverse base current () the fall is at least four times faster. The smaller is (heavier overdrive, larger ), the faster the fall: the reverse current drives toward steeply, so the window is crossed quickly ( as ). As the benefit shrinks to .
Chapter 13 — PNPN Devices
The big picture. We have met the two-region, one-junction diode and the three-region, two-junction transistor. Add one more region and you get four alternating regions and three interacting junctions: the PNPN device, or thyristor. Think of a mousetrap: it sits quietly until a small nudge releases stored energy and it snaps shut, staying shut. Thyristors are electronic mousetraps. They block a high voltage until a tiny gate trigger flips them into a low-resistance state that latches. They are used as high-power rectifiers and switches, often large-area devices in metal stud packages for heat dissipation, with ratings above 5 kA and 10 kV. We concentrate on the silicon controlled rectifier (SCR). (The source text lists this chapter as read-only; it has no end-of-chapter problem set or summary section, so none is solved here. A short recap is given at the end.)
13.1 Silicon Controlled Rectifier (SCR)
Structure (Fig. 13.1a). Four alternately doped regions P1, N2, P3, N4 and three junctions: (P1–N2), (N2–P3), (P3–N4).
- The outer P region (P1) and its contact: anode (A).
- The outer N region (N4) and its contact: cathode (K).
- The inner regions N2 and P3 are the bases.
- The third terminal, the gate (G), connects to P3.
- Without a gate lead, the device is the PNPN (Shockley) diode.
Variables: anode-to-cathode voltage, current into the anode, current into the gate.
Fabrication and doping profile (Fig. 13.1b). Start with a thinned, lightly doped n-type Si wafer ( cm), which becomes N2. Diffuse p-type dopant into both sides, giving nearly identical and junctions. Finally diffuse n-type dopant into one side to form the heavily doped N4 cathode. The base regions N2 and P3 have moderate electrical widths, e.g. m and m, comparable to a minority-carrier diffusion length. That is the secret of the device: unlike a wide-base diode (widths ) or a BJT (base ), the junctions are close enough to talk to each other but not so close that they merge.
Characteristics (Fig. 13.2).
- : independent of , like a reverse-biased pn diode; little current until breakdown at (the reverse blocking voltage).
- with : little current until reaches the forward blocking voltage . Beyond it the device switches from the high-impedance blocking mode to the low-impedance conducting mode and then follows a diode-like forward characteristic near V.
- lowers , so the device turns on at a lower .
- and can be hundreds to thousands of volts; the conducting drop is typically about a volt.
13.2 SCR Operational Theory
Start with (then the SCR behaves as the PNPN diode). Strategy: begin with the simplest model and refine it only as far as needed.
The diode model
Model the SCR as three pn diodes in series (Fig. 13.3a).
- : the middle diode () is forward biased and replaced by a short (Fig. 13.3b). The remaining diodes and are reverse biased. From Fig. 13.1(b), the lightly doped side of is about cm (high breakdown voltage), whereas the lightly doped side of (the P3 side) is about cm, so breaks down at a relatively small reverse voltage and then acts like a short. The reverse characteristic is therefore basically that of the junction.
- : and are forward biased and replaced by shorts (Fig. 13.3c); is reverse biased, so the forward blocking characteristic is that of the junction.
Because and have nearly identical doping profiles, the predicted characteristic is nearly symmetric about (Fig. 13.4), with , both near the breakdown voltage of or (the smaller of the avalanche breakdown voltage and the punch-through voltage that fully depletes the lightly doped N2 region). In reality the observed blocking voltages are always somewhat smaller than these upper limits.
What the diode model gets right: the general form of the reverse and forward blocking regions. What it gets wrong: it cannot produce forward switching, because it ignores the interaction between junctions, and such an interaction must exist since , are comparable to the diffusion lengths.
The two-transistor model
Split the SCR into two interconnected BJTs (Fig. 13.5): P1–N2–P3 is a pnp transistor (emitter P1, base N2, collector P3) and N2–P3–N4 is an npn transistor (emitter N4, base P3, collector N2). Wires join the shared regions: the base of the pnp is the collector of the npn and vice versa. Both BJTs are intrinsically low gain (base widths only comparable to , so transport factors and hence ‘s are well below unity at normal operation).
Qualitative regeneration (Fig. 13.6). Assume blocking mode, , . Both transistors are active-mode biased.
- Majority carriers from the P1 and N4 emitters are injected into the adjacent bases.
- A fraction diffuses across the base.
- They arrive in the base of the other transistor, where they appear as an excess of majority carriers that cannot escape through an external terminal.
- This excess raises base-to-emitter forward bias in the other transistor, increasing its emitter injection, which feeds back around the loop, giving more carriers… a regenerative (positive-feedback) process, like the squeal of a microphone near its loudspeaker.
At low the loop gain is below one, so the process is stable and the carrier build-up around is negligible. As grows, the build-up reduces the reverse bias of and finally forward biases it (a junction is forward biased when minority carriers exceed equilibrium at the depletion-region edges). In BJT language both transistors become saturated. The SCR enters the low-impedance conducting mode when all three junctions are forward biased.
Quantitative condition. Each transistor in blocking mode is active biased, so use the large-signal active-mode Ebers–Moll equivalent circuits (Fig. 13.7a,b): current source (the reverse generator is negligible) and a leakage ( small, , ). Connect them as in Fig. 13.5 (Fig. 13.7c), subscript 1 for the pnp and 2 for the npn. Equating the current into and out of node (the cathode)… equivalently the current at the anode:
I_{AK}=\alpha_1I_{AK}+I_{RO1}+\alpha_2I_{AK}+I_{RO2}\tag{13.1}
Collect the terms:
\boxed{I_{AK}=\frac{I_{RO1}+I_{RO2}}{1-(\alpha_1+\alpha_2)}}\tag{13.2}
As the denominator vanishes and the current grows without bound (limited only by the external circuit): the critical switching condition is . The SCR is built so that at small . Several mechanisms push up as increases. Recall
\alpha_{dc}=M\gamma\alpha_T\tag{13.3}
with the base transport factor, the emitter efficiency, and the carrier multiplication factor.
- Base-width modulation. is reverse biased, and its depletion region extends mostly into the lightly doped N2 base of the pnp. Increasing narrows the quasineutral base, increasing .
- Emitter efficiency. Recombination–generation current reduces at low injection levels. As the current increases with , the injection level rises and increases.
- Carrier multiplication. If the first two effects are insufficient, avalanche multiplication in the reverse-biased junction ultimately triggers the SCR. Hence the breakdown voltage of is the upper limit of .
Why gate current lowers . A positive into P3 supplies majority carriers (holes) to the base of the N2–P3–N4 transistor, enhancing injection from the N4 emitter. The regenerative loop becomes unstable (loop gain reaching one) at a lower . A few milliamps of gate current can trigger many amperes of anode current.
13.3 Practical Turn-On/Turn-Off Considerations
13.3.1 Circuit Operation
Consider the bias circuit of Fig. 13.8b ( in series with ) and the load line on the forward characteristics (Fig. 13.8a). The “off” point is the intersection with the blocking branch; the “on” point is the intersection with the conducting branch near .
Turn-on:
- Increase : the load line shifts parallel toward larger . When it no longer intersects the blocking branch (i.e. ), the device switches on.
- Or increase from zero: when the high-impedance branch of the curve (e.g. curve ) no longer meets the load line, the operating point jumps to the “on” point.
- Once latched on, can be removed and the SCR stays on.
Turn-off:
- Reduce so that falls below the holding current ; the conducting state cannot be sustained and the device reverts to blocking.
- Theoretically (extracting gate current) can also turn it off, but the extraction rate from P3 must exceed the entry rate, which requires special devices carrying large gate currents (e.g., A to turn off A). Specially designed devices are gate turn-off (GTO) SCRs.
13.3.2 Additional Triggering Mechanisms
- Light: a sufficiently intense pulse with generates carriers, producing the required injection, with a window to the P3 region. Advantage: complete electrical isolation of the input. Such a device is a light-activated SCR (LASCR) or light-activated switch (LAS).
- Temperature: the forward blocking voltage falls with temperature, equivalent to applying ; this limits operation to roughly 125–150 °C.
- Noise: because of the very high current gain (–), noise pulses in the gate circuit can trigger the device inadvertently. This is remedied, at the expense of triggering sensitivity, by the shorted-cathode configuration. Unexpected temperature rise can also cause inadvertent switching; mounting high-power devices on metal studs improves heat dissipation.
13.3.3 Shorted-Cathode Configuration
Built as described in 13.1, (and hence and the forward characteristics) are extremely sensitive to the base dopings and widths. The first commercial PNPN diode venture failed financially because the turn-on voltage could not be held within tolerance. The now-standard fix is the shorted-cathode structure (Fig. 13.9): the cathode metallization is extended to also contact the P3 region at a point remote from the gate.
How it works: at low the P3/N4 short essentially removes injection from N4, so the gain of the N2–P3–N4 transistor is nearly zero. At larger , the lateral hole current flowing in P3 beneath N4 produces a forward P3-to-N4 voltage drop that increases from point A (near the short) to point B (far from the short). When the potential at B reaches about 0.7 V, strong N4-to-P3 injection starts near B. In quick succession rises, the injecting region widens from B toward A, the npn gain rises abruptly, injection becomes uniform across the N4 face, , and the SCR latches. Thus the switching characteristic is made reproducible by controlling the resistance of P3 beneath the cathode, instead of the delicate gains.
13.3.4 di/dt and dv/dt Effects
di/dt. A large, short gate pulse can minimize turn-on time. But in a shorted-cathode SCR, if rises too fast the injection across P3–N4 is concentrated near the gate before spreading across the cathode face. The resulting local current crowding heats the region and can cause thermal failure: di/dt burnout. The di/dt of the turn-on pulse must be limited.
dv/dt. A rapidly applied anode-to-cathode voltage makes the SCR conduct prematurely: the faster the rise, the lower the voltage required for turn-on. The same occurs under high-frequency ac operation or a high-voltage noise spike. Cause: the depletion width of widens as increases, which requires a displacement (charging) current ; this majority-carrier current in the bases induces extra injection from P1 and N4, raising the transistor gains. The larger , the larger the enhanced gain and the lower the blocking voltage.
13.3.5 Triggering Time
Carriers injected from the anode and cathode must cross the adjacent bases. The average diffusion transit time across a quasineutral base is (Chapter 12). With quasineutral widths (N2) and (P3), the transit times are
(holes cross N2; electrons cross P3). To first order the triggering time is the geometric mean:
t_{on}\approx\sqrt{t_1t_2}=\sqrt{\frac{W_2^2}{2D_p}\cdot\frac{W_3^2}{2D_n}}=\frac{W_2W_3}{2\sqrt{D_pD_n}}\tag{13.4}
Small base widths give fast switching. But smaller widths mean larger transistor gains and lower punch-through voltages, so lower blocking voltage and power capability: a trade-off between high power handling and rapid switching.
13.3.6 Switching Advantages/Disadvantages (SCR vs BJT)
Advantages
- Very little gate current turns on very large anode currents.
- Can block both polarities of an ac signal.
- Very high blocking voltage together with low conducting voltage drop.
- Unlike the BJT, no current crowding in steady-state conduction.
Disadvantages
- Cannot be turned off by setting (a BJT turns off when base current is removed).
- Cannot operate at high frequencies.
- Prone to turning on from noise voltage spikes.
- Limited temperature range of operation.
13.4 Other PNPN Devices
- Dual-gate SCR / silicon controlled switch (SCS) (Fig. 13.10): gates to both bases (G1 at P3… and G2 at N2); can be triggered through either, giving the designer more flexibility.
- Bilateral devices respond symmetrically to positive and negative applied voltage.
- DIAC (diode AC) (Fig. 13.11): an integrated pair of oppositely oriented PNPN diodes connected in parallel; the I-V curve switches in both polarities.
- TRIAC (triode AC) (Fig. 13.12): the bilateral SCR, two oppositely oriented SCRs in parallel sharing a gate; ideal for ac power control such as light dimmers and motor speed control.
- Programmable unijunction transistor (PUT) (Fig. 13.13): despite its name, not a unijunction transistor. A UJT is a three-lead device with two ohmic contacts at the ends of a bar-like resistive region and a third lead to a pn junction along the bar; it switches somewhat like an SCR. The PUT is actually an anode-gated PNPN device: the gate contacts the N2 base instead of P3. Connected as in Fig. 13.13(b) (gate set by a divider , from , with in the cathode), it mimics a UJT, with the peak voltage (plus a diode drop) and characteristics like Fig. 13.13(c). Changing the external , changes the characteristics: hence “programmable.”
Chapter 13 recap
- Four layers, three junctions; base widths diffusion length so the junctions interact.
- Diode model gives the blocking regions; the two-transistor model (pnp + npn cross-connected) explains switching via positive feedback: , switching when .
- Triggering: voltage, gate current, light, temperature, . Turn-off: current below (or gate extraction in a GTO).
- Shorted-cathode structure makes the characteristics reproducible; and ratings limit use; .
- Family: SCR, PNPN diode, SCS, DIAC, TRIAC, PUT.